74AHCT126PW,112 NXP Semiconductors, 74AHCT126PW,112 Datasheet - Page 8

• Manufacturer Part Number: 74AHCT126PW,112
• Description: IC BUFF DVR TRI-ST QD 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AHCTr

Specifications of 74AHCT126PW,112

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 4
• Number Of Bits Per Element: 1
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Logic Family: AHCT
• Number Of Channels Per Chip: 4
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 8 mA
• Low Level Output Current: 8 mA
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 4 / 4
• Output Type: 3-State
• Propagation Delay Time: 7.5 ns at 4.5 V to 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74AHCT126PW; 74AHCT126PW; 935262767112

NXP Semiconductors
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11. Waveforms
74AHC_AHCT126_3
Product data sheet
Fig 5.
Fig 6.
Typical values are measured at nominal supply voltage (V
t
t
t
C
P
f
f
C
V
N = number of inputs switching;
pd
en
dis
i
o
(C
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
is the same as t
= output load capacitance in pF;
is the same as t
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
Measurement points are given in
V
Input to output propagation delays
Measurement points are given in
V
Enable and disable times
PD
V
OL
OL
CC
2
and V
and V
V
CC
f
o
2
) = sum of the outputs.
OH
OH
PLH
PZL
f
PLZ
i
are typical voltage output levels that occur with the output load.
are typical voltage output levels that occur with the output load.
and t
N + (C
and t
and t
HIGH-to-OFF
OFF-to-HIGH
LOW-to-OFF
OFF-to-LOW
PZH
PHL
PHZ
nOE input
output
output
L
.
.
.
V
CC
nY output
nA input
2
GND
GND
V
Table
V
Table
V
f
OH
CC
OL
o
V
) where:
I
8.
8.
GND
V
V
OH
OL
V
I
enabled
V
Rev. 03 — 25 April 2008
outputs
M
t
PLZ
t
PHZ
CC
D
in W).
= 3.3 V and V
V
M
V
V M
X
V
Y
t
PHL
74AHC126; 74AHCT126
disabled
CC
outputs
= 5.0 V).
t
PZL
t
PZH
mna237
t
PLH
V
M
V
Quad buffer/line driver; 3-state
M
outputs
enabled
mna949
© NXP B.V. 2008. All rights reserved.
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