74AHCT126PW,118 NXP Semiconductors, 74AHCT126PW,118 Datasheet
74AHCT126PW,118
Specifications of 74AHCT126PW,118
74AHCT126PW-T
935262767118
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74AHCT126PW,118 Summary of contents
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Quad buffer/line driver; 3-state Rev. 04 — 12 August 2009 1. General description The 74AHC126; 74AHCT126 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL specified in compliance with JEDEC ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74AHC126D +125 C 74AHCT126D 74AHC126PW +125 C 74AHCT126PW 74AHC126BQ +125 C 74AHCT126BQ 4. Functional diagram Fig 1. Functional diagram nA nOE Fig 2. Logic symbol 74AHC_AHCT126_4 Product data sheet 74AHC126; 74AHCT126 Description SO14 plastic small outline package; 14 leads; ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning 74AHC126 74AHCT126 1OE 2OE GND 7 001aac982 Fig 4. Pin configuration SO14 and TSSOP14 5.2 Pin description Table 2. Pin description Symbol Pin 1OE 2OE GND 3OE 4OE 74AHC_AHCT126_4 Product data sheet 74AHC126; 74AHCT126 4OE 3OE 9 3A ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function table Control nOE [ HIGH voltage state LOW voltage state don’t care high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Operating conditions Symbol Parameter 74AHC126 V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 74AHCT126 V supply voltage CC V input voltage I V output voltage O T ambient temperature ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I input leakage GND current 5 OFF-state output current 5 supply current 5 input capacitance C output O capacitance 74AHCT126 V HIGH-level input voltage V LOW-level input voltage V HIGH-level ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 74AHC126 t propagation nA to nY; see pd delay enable time nOE to nY; see disable time nOE to nY; see dis 3.6 V ...
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... NXP Semiconductors [1] Typical values are measured at nominal supply voltage (V [ the same as t and PLH PHL [ the same as t and PZL PZH [ the same as t and t . dis PLZ PHZ [ used to determine the dynamic power dissipation ( input frequency in MHz output frequency in MHz output load capacitance in pF; ...
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... NXP Semiconductors Table 8. Measurement points Type Input V M 74AHC126 0.5 74AHCT126 1.5 V negative positive Test data is given in Table Definitions test circuit termination resistance should be equal to output impedance load capacitance including jig and probe capacitance load resistance test selection switch. Fig 8. Test circuitry for measuring switching times Table 9 ...
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... NXP Semiconductors 12. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.01 0.069 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 14. Revision history Table 11. Revision history Document ID Release date ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13 14 Revision history ...