74LVC3G17GD,125 NXP Semiconductors, 74LVC3G17GD,125 Datasheet - Page 9

• Manufacturer Part Number: 74LVC3G17GD,125
• Description: IC BUFF SCHMT TRG TRPL 8XSON
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC3G17GD,125

• Logic Type: Schmitt Trigger - Buffer, Driver
• Package / Case: 8-XSON
• Number Of Elements: 3
• Number Of Bits Per Element: 1
• Current - Output High, Low: 32mA, 32mA
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: LVC
• Number Of Channels Per Chip: 3
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 32 mA
• Input Bias Current (max): 40 uA
• Low Level Output Current: 32 mA
• Minimum Operating Temperature: - 40 C
• Propagation Delay Time: 3.8 ns (Typ) @ 2.7 V
• Number Of Lines (input / Output): 3 / 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74LVC3G17GD-G; 74LVC3G17GD-G; 935286864125

NXP Semiconductors
Table 10.
Table 11.
14. Waveforms transfer characteristics
74LVC3G14
Product data sheet
V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Supply voltage
V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Fig 9.
Fig 10. Transfer characteristic
CC
CC
Test data is given in
R
C
R
V
Load circuitry for switching times
L
L
T
EXT
Measurement points
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
V
= External voltage for measuring switching times.
O
V
T−
Input
V
V
V
2.7 V
2.7 V
V
I
CC
CC
CC
V
Table
H
V
T+
11. Definitions for test circuit:
mna207
Input V
0.5 × V
0.5 × V
1.5 V
1.5 V
0.5 × V
G
All information provided in this document is subject to legal disclaimers.
V
t
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
I
r
= t
V
CC
CC
CC
I
M
f
Rev. 8 — 19 August 2010
R T
DUT
V
CC
Triple inverting Schmitt trigger with 5 V tolerant input
Fig 11. Definition of V
Load
C
30 pF
30 pF
50 pF
50 pF
50 pF
V
L
O
V
V
O
V
I
C L
o
T+
of the pulse generator.
and V
V
mna616
EXT
R L
R L
V
T−
T+
Output V
0.5 × V
0.5 × V
1.5 V
1.5 V
0.5 × V
limits at 70 % and 20 %.
R
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
L
T+
, V
CC
CC
CC
T−
M
and V
V
74LVC3G14
T−
H
© NXP B.V. 2010. All rights reserved.
V
t
open
open
open
open
open
PLH
EXT
mna208
, t
PHL
V
H
9 of 23