CD2401 Intel, CD2401 Datasheet - Page 11
![no-image](/images/manufacturer_photos/0/3/336/intel_sml.jpg)
CD2401
Manufacturer Part Number
CD2401
Description
Multi-protocol Communications Controller
Manufacturer
Intel
Datasheet
1.CD2401.pdf
(176 pages)
- Current page: 11 of 176
- Download datasheet (918Kb)
1.1
1.2
Datasheet
Figure 1. Functional Block Diagram
INTERFACE
HOST
Benefits
CD2XXX Family Compatibility
Number of serial channels
Interrupt and on-chip DMA
mechanism
FIFO depth (per channel and
per direction)
Data size (bits)
Async
SDLC/HDLC
X.21, bisync
Async-HDLC, PPP
SLIP
MNP 4
Serial data rate: sync / async
(kbits/sec.)
•
•
•
Substantially reduced host CPU overhead resulting in more channels and faster overall
throughput
No time-critical host software enabling faster and easier software development
Smallest possible footprint for multi-channel device
CONTROLLER
INTERFACE
INTERFACE
ON-CHIP
LOGIC
LOGIC
HOST
BUS
DMA
AND
Features
FIRMWARE
ROM
256 / 230.4
Multi-Protocol Communications Controller — CD2401
16 bytes
CD2231
2
–
2
PROPRIETARY
PROCESSOR
3,4
RISC
RAM
128 / 134.4
CD2401
16 bytes
4
–
–
–
c
TIMER/BRG/DPLL
TIMER/BRG/DPLL
TIMER/BRG/DPLL
TIMER/BRG/DPLL
TRANSMIT/CRC
TRANSMIT/CRC
TRANSMIT/CRC
TRANSMIT/CRC
RECEIVE/CRC
RECEIVE/CRC
RECEIVE/CRC
RECEIVE/CRC
MODEM
MODEM
MODEM
MODEM
128 / 134.4
16 bytes
CD2431
4
–
c
INTERFACE
CHANNELS
4 SERIAL
128 / 134.4
CD2481
16 bytes
4
–
c
11
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