CD2401 Intel, CD2401 Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/3/336/intel_sml.jpg)
CD2401
Manufacturer Part Number
CD2401
Description
Multi-protocol Communications Controller
Manufacturer
Intel
Datasheet
1.CD2401.pdf
(176 pages)
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Contents
1.0
2.0
3.0
4.0
5.0
Datasheet
Features
1.1
1.2
Conventions
Pin Information
3.1
3.2
3.3
Register Table
4.1
4.2
Functional Description
5.1
5.2
5.3
5.4
Benefits ...............................................................................................................11
CD2XXX Family Compatibility.............................................................................11
Pin Diagram ........................................................................................................15
Pin Functions.......................................................................................................16
Pin Descriptions ..................................................................................................16
Memory Map .......................................................................................................21
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.1.6
4.1.7
Register Definitions .............................................................................................26
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
Host Interface ......................................................................................................35
5.1.1
5.1.2
Interrupts .............................................................................................................37
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
FIFO and Timer Operations ................................................................................43
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
DMA Operation....................................................................................................44
5.4.1
......................................................................................................................... 9
Global Registers.....................................................................................21
Option Registers.....................................................................................22
Bit Rate and Clock Option Registers......................................................22
Channel Command and Status Registers ..............................................23
Interrupt Registers..................................................................................23
DMA Registers .......................................................................................24
Timer Registers ......................................................................................26
Global Registers.....................................................................................26
Option Registers.....................................................................................26
Bit Rate and Clock Option Registers......................................................29
Channel Command and Status Registers ..............................................29
DMA Registers .......................................................................................32
Timer Registers ......................................................................................33
Host Read and Write Cycles ..................................................................35
Byte and Word Transfers .......................................................................37
Contexts and Channels ..........................................................................38
Interrupt Registers..................................................................................38
Groups and Types..................................................................................39
Hardware Signals and IACK Cycles .......................................................41
Multi–CD2401 Systems..........................................................................42
Receive FIFO Operation ........................................................................43
Transmit FIFO Operation .......................................................................43
Timers ....................................................................................................43
Timers in Synchronous Protocols...........................................................44
Timers in Asynchronous Protocols.........................................................44
Transmit Timer .......................................................................................44
Bus Acquisition Cycle.............................................................................45
...............................................................................................................13
............................................................................................................21
..........................................................................................................15
...........................................................................................35
Multi-Protocol Communications Controller — CD2401
3
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