PM5366-PI PMC-Sierra, Inc., PM5366-PI Datasheet - Page 114

• Manufacturer Part Number: PM5366-PI
• Description: HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
• Manufacturer: PMC-Sierra, Inc.

PRELIMINARY
DATASHEET
PMC-2010672
9.26 Receive Tributary Byte Synchronous Demapper
PROPRIETARY AND CONFIDENTIAL
Conversely, if the majority of the stuff control bits indicate a data operation, the
appropriate stuff opportunity bit(s) will carry T1 or E1 payload.
The RTDM, in cooperation with the T1/E1 jitter attenuator, attenuates jitter
introduced by pointer justification events. The T1/E1 jitter attenuator may be
bypassed, in which case an external device may use the SBI Link Rate Octet
generated by RTDM to determine the clock phase. When a pointer justification
is detected, the RTDM issues evenly spaced 1/12 UI T1 adjustments or 1/9 UI
E1 adjustments encoded in the SBI Link Rate Octet.
The RTDM optionally acts as a time switch. When time switching is enabled, the
association of timeslots on the system interface (SBI or H-MVIP) to incoming
tributaries is software configurable. There are two pages in the time switch
configuration RAM. One page is software selectable to be the active page and
the other the stand-by page. The configuration in the active page is used to
switch incoming tributaries. The stand-by page can be programmed to the next
switch configuration. Change of page selection is effected immediately. The one
constraint on switch configuration is that the all the remapped tributaries in an
SPE must be of the same type (T1 or E1).
Each one of three Receive Tributary Byte Synchronous Demappers demaps up
to 28 T1 or 21 E1 byte synchronous mapped signals from an STS-1 SPE, TUG3
within a STM-1/VC4 or STM-1 VC3 payload.
inaccordance with ITU-T Recommendation G.709 and ANSI T1.105.
Byte synchronous demapping is enabled on a per-tributary basis by setting the
ENBL bit through the Byte Synchronous Demapping Tributary Control RAM
Indirect Access Data register and by bypassing the receive jitter attenuator by
setting the RJATBYP bit through the RJAT Indirect Channel Data register.
Given that frame alignment is provided by the mapping function, the T1/E1
framer doesn’t provide the frame alignment for the system interface. If the
tributary ‘F’ bit position contains valid framing information, the T1/E1 framer may
be used for performance and alarm monitoring.
Signaling, if present, may be dealt with in two ways for T1. By default, the T1
framer attempts to find frame and extracts the signaling from the robbed bit
signaling positions. Alternately, the values encoded in the S
positions are presented on the system interface verbatim without debounce or
freezing if the RAWSIG bit programmed through the SIGX Indirect Channel Data
registers is logic 1. This is programmed on a per-tributary basis. For E1, the
signaling is extracted from “Multiframe alignment signal” byte.
ISSUE 1
102
The demapping is done
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
1
S
2
S
3
S
AND M13 MULTIPLEXER
PM5366 TEMAP-84
4
bit