STE10-100A STMicroelectronics, STE10-100A Datasheet - Page 26
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STE10-100A
Manufacturer Part Number
STE10-100A
Description
Pci 10/100 Ethernet Controller With Integrated Phy
Manufacturer
STMicroelectronics
Datasheet
1.STE10-100A.pdf
(82 pages)
- Current page: 26 of 82
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Functional description
26/82
Receive operation for PAUSE function
Upon reception of a valid MAC Control frame, the STE10/100A will start a timer for the
length of time specified by the MAC control parameters field. When the timer value reaches
zero, the STE10/100A exits the PAUSE state. However, a PAUSE frame will not affect the
transmission of a frame that has been submitted to the MAC (i.e., once a transmit out of the
MAC is begun, it can’t be interrupted). Conversely, the STE10/100A will not begin to transmit
a frame more than one slot-time after valid PAUSE frame is received a with a non-zero
PAUSE time. If the STE10/100A receives a PAUSE frame with a zero PAUSE time value, the
STE10/100A exits the PAUSE state immediately.
Figure 15. Pause operation receive state diagram
Transmission_in_progress = false *
DA = (01-80-C2-00-00-01 + Phys-address)
PAUSE function
n_slots_rx = data [17:32]
Start pause_timer (n_slots_rx * slot_time)
Wait for transmission completed
Opcode = PAUSE function
DA ≠ (01-80-C2-00-00-01 + Phys-address)
END PAUSE
UCT
STE10/100A
PC00359
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