S1D13700F01 Epson Electronics America, Inc., S1D13700F01 Datasheet - Page 126

no-image

S1D13700F01

Manufacturer Part Number
S1D13700F01
Description
Embedded Memory Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13700F01A100
Manufacturer:
MTK
Quantity:
5 000
Part Number:
S1D13700F01A100
Manufacturer:
Epson Electronics America Inc-Semiconductor Div
Quantity:
10 000
Part Number:
S1D13700F01A100
Manufacturer:
EPSON/爱普生
Quantity:
20 000
Page 126
17 Power Save Mode
S1D13700F01
X42A-A-002-04
XCD1
FPDAT[3:0]
FPFRAME
FPSHIFT
LCD Pin
FPLINE
WAIT#
D[7:0]
YSCL
XECL
YDIS
MOD
/ XCG1
The S1D13700F01 supports a power save mode that places it into a power efficient state.
Power save mode is controlled by the Power Save Mode Enable bit, REG[08h] bit 0. The
S1D13700F01 enters power save mode at least one blank frame after the enable bit is set.
When power save mode is enabled, blank data is sent to the X-drivers, and the Y-drivers
have their bias supplies turned off by the YDIS signal. Using the YDIS signal to disable the
Y-drivers guards against any spurious displays. The internal registers of the S1D13700F01
maintain their values during the power save state and the display memory control pins
maintain their logic levels to ensure that the display memory is not corrupted.
The S1D13700F01 is removed from power save mode by writing a 0 the Power Save Mode
Enable bit, REG[08h] bit 0. However, after disabling power save mode, one dummy write
to any register must be performed for direct addressing mode, and at least two dummy
writes must be performed for indirect addressing mode.
For indirect addressing mode, the POWER SAVE command has no parameter bytes. For
indirect addressing mode, the SYSTEM SET command exits power save mode.
1. The YDIS signal goes LOW between one and two frames after the power save com-
2. Since all internal clocks in the S1D13700F01 are halted while power save mode is en-
3. The bus lines become high impedance when power save mode is enabled. If the bus is
mand is received. Since YDIS forces all display driver outputs to go to the deselected
output voltage, YDIS can be used as a power down signal for the LCD unit. This can
be done by having YDIS turn off the relatively high power LCD drive supplies at the
same time as it blanks the display.
abled, a DC voltage is applied to the LCD panel if the LCD drive supplies remain on.
If reliability is a prime consideration, turn off the LCD drive supplies before issuing
the power save command.
required to be a known state, pull-up or pull-down resistors can be used.
Table 17-1 State of LCD Pins During Power Save Mode
State During Display Off
Running
High
Low
Low
Low
Low
Low
Low
X
Revision 4.05
State During Power Save Mode
Stopped
High
Low
Low
Low
Low
Low
Low
Low
Hi-Z
Hi-Z
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 2005/12/13

Related parts for S1D13700F01