S1D13700F01 Epson Electronics America, Inc., S1D13700F01 Datasheet - Page 67

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S1D13700F01

Manufacturer Part Number
S1D13700F01
Description
Embedded Memory Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Epson Research and Development
Vancouver Design Center
10.3.3 Drawing Control Registers
CSRW
bits 15-0
Hardware Functional Specification
Issue Date: 2005/12/13
REG[1Ch] Cursor Write Register 0
Address = 801Ch
REG[1Dh] Cursor Write Register 1
Address = 801Dh
7
7
6
6
Default = 00h
Default = 00h
Note
The CSRW command sets the cursor address when indirect addressing is used. The values
from REG[1Ch] through REG[1Dh] are passed as parameters when the CSRW command
is issued. For further information on the CSRW command, see Section 11.1.10, “CSRW”
on page 75.
For Indirect Addressing Mode:
The MREAD and MWRITE commands use the address in this register when in indirect
mode. The cursor address register can only be modified by the CSRW command, and by
the automatic increment after an MREAD or MWRITE command. It is not affected by
display scrolling.
If a new address is not set, display memory accesses are from the last set address or the
address after previous automatic increments.
Cursor Write (CSRW) bits [15:0]
These bits set the display memory address to the data at the cursor position as shown in
Figure 12-10 “Cursor Movement,” on page 86.
The microprocessor cannot directly access the display memory in indirect addressing
mode.
5
5
Cursor Write bits 15-8 (MSB)
Cursor Write bits 7-0 (LSB)
4
4
Revision 4.05
3
3
2
2
1
1
Write Only
Write Only
X42A-A-002-04
S1D13700F01
0
0
Page 67

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