S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 185

• Manufacturer Part Number: S1D13503
• Description: S1d13503 Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 1
S1D13503F00A Register Summary
S1D13503F00A Register Summary
Test Mode
AUX[00] T
AUX[01] M
AUX[02] L
AUX[03] M
AUX[04] T
AUX[05] T
AUX[06] S
AUX[07] S
AUX[08] S
AUX[09] S
AUX[0A] S
Enable
Bit 15
Bit 15
DISP
Bit 7
Power Save Mode
Bit 1
Bit 7
Bit 5
Bit 7
Bit 7
Bit 7
EST
INE
OTAL
OTAL
CREEN
CREEN
CREEN
CREEN
ODE
ODE
CREEN
reserved
must = 0
B
R
R
Panel
R
Bit 14
Bit 14
YTE
Bit 6
Bit 0
D
Bit 6
D
Bit 4
Bit 6
Bit 6
Bit 6
EGISTER
EGISTER
EGISTER
ISPLAY
ISPLAY
1 D
1 D
2 D
2 D
1 D
C
ISPLAY
ISPLAY
ISPLAY
ISPLAY
ISPLAY
OUNT
:
L
L
I/O address = 0000b, RW
0:
1:
Mask XSCL
INE
INE
LCD Signal
R
I/O address = 0001b, RW
I/O address = 0011b, RW
S
S
S
S
L
EGISTER
State
Bit 13
Bit 13
Bit 2
Bit 5
Bit 5
Bit 3
TART
Bit 5
TART
TART
Bit 5
TART
Bit 5
C
C
INE
OUNT
OUNT
Screen 1 Display Start Address (high byte)
Screen 2 Display Start Address (high byte)
Screen 1 Display Start Address (low byte)
Screen 2 Display Start Address (low byte)
Test Input Select / Scratch
Screen 1 Display Line Count (low byte)
C
WF Count
Total Display Line Count (low byte)
A
A
A
A
OUNT
DDRESS
DDRESS
DDRESS
DDRESS
R
R
(LSB):
EGISTER
EGISTER
Line Byte Count (low byte)
LUT Bypass
R
LCDE
EGISTER
Bit 12
Bit 12
Bit 1
Bit 4
Bit 4
Bit 2
Bit 4
Bit 4
Bit 4
I/O address = 0010b, RW
R
R
R
R
EGISTER
EGISTER
EGISTER
EGISTER
(LSB):
(MSB)
(LSB):
Gray Shade
Width Bit 1
LCD Data
I/O address = 0100b, RW
AND
(LSB):
(MSB):
(LSB):
(MSB):
/ Color
Bit 11
Bit 11
Bit 0
Bit 3
Bit 3
Bit 1
Bit 3
Bit 3
Bit 3
I/O address = 1010b, RW
WF C
I/O address = 0110b, RW
I/O address = 1000b, RW
I/O address = 0111b, RW
I/O address = 1001b, RW
OUNT
Width Bit 0
LCD Data
BW / 256
Colors
R
Bit 10
Bit 10
Bit 2
Bit 2
Bit 2
Bit 0
Bit 2
Bit 2
Bit 2
EGISTER
Test Output Select / Scratch
:
Color Mode
I/O address = 0101b, RW
Total Display Line Count
Interface
Memory
Bit 1
Bit 1
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Count Bit 8
Line Byte
RAMS
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Notes
1 n/a bits should be written 0.
2 These bits are used to identify the S1D13503 at power on / RESET. If these bits read 00b at Power On /
AUX[0B] S
AUX[0C] H
AUX[0D] A
AUX[0E] L
AUX[0F] L
Reset the device is an S1D13503F00A. If this bit reads 10b at Power On / Reset the device is an
S1D13502F00B. If this bit reads 11b at Power On / Reset the device is an S1D13502F00A.
Green Bank Select
Bit 7
Bit 7
Bit 1
Bit 1
n/a
Red Bank Select
1
OOKUP
CREEN
ORIZONTAL
DDRESS
OOK
-U
Bit 6
Bit 6
Bit 0
Bit 0
n/a
P
1 D
T
P
T
ABLE
ABLE
ITCH
ISPLAY
N
ON
D
A
A
-D
ATA
DJUSTMENT
DDRESS
L
ISPLAY
Bit 5
Bit 5
Bit 1
Bit 1
INE
n/a
Blue Bank Select
ID
R
EGISTER
2
C
/ RGB Index
OUNT
R
P
EGISTER
ERIOD
Horizontal Non-Display period
R
Address Pitch Adjustment
:
EGISTER
R
I/O address = 1111b, RW
EGISTER
Bit 4
Bit 4
Bit 0
Bit 0
R
n/a
:
EGISTER
I/O address = 1110b, RW
:
I/O address = 1101b, RW
(MSB):
:
I/O address = 1100b, RW
Bit 3
Bit 3
Bit 3
Bit 3
n/a
I/O address = 1011b, RW
Bit 2
Bit 2
Bit 2
Bit 2
n/a
Palette Address
Palette Data
Screen 1 Disp Line Count
Bit 9
Bit 1
Bit 1
Bit 1
Bit 1
Bit 8
Bit 0
Bit 0
Bit 0
Bit 0
X18A-Q-002-05
01/03/02