S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 57

• Manufacturer Part Number: S1D13503
• Description: S1d13503 Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 01/01/29
Where t
where HT = (number of horizontal panel pixels) * t
where HNDP = horizontal non-display period in units of t
** 5V operation, for 3.0V and 3.3V operation T11 will be 1.5t
Symbol
t10
t11
t12
t13
t14
t15
t1
t1
t2
t3
t4
t5
t6
t6
t7
t8
t9
OSC
= 1/f
LP period (single panel mode)
LP period (dual panel mode)
YD hold from LP falling edge
LP pulse width
WF delay from LP falling edge
LP setup to XSCL falling edge
XSCL falling edge to LP falling edge
(single panel mode)
XSCL falling edge to LP falling edge
(dual panel mode)
LP falling edge to XSCL falling edge
XSCL period
XSCL high width
XSCL low width
UD/LD setup to XSCL falling edge
UD/LD hold from XSCL falling edge
LP falling edge to XSCL rising edge
UD/LD setup to XSCL rising edge
UD/LD hold from XSCL rising edge
OSC
= input (pixel) clock period,
Table 7-15: LCD Interface Timing - 16-Bit Single/Dual Color Panels
Parameter
OSC
,
OSC
(see Section 9.3 on page 84 for details).
OSC
2(HT + HNDP) - 10
- 24.
HT + HNDP - 10
1.5t
1.5t
13t
15t
0.5t
22t
20t
52t
17t
3t
5t
5t
2t
t
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
Min
OSC
OSC
OSC
OSC
OSC
0
- 10**
- 10
- 5
- 10
- 5
- 5
- 5
- 10
- 10
- 5
- 5
- 5
- 5
- 5
Typ
Max
20
X18A-A-001-08
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
S1D13503
Page 49