XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 16
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
XA-SCC
Manufacturer Part Number
XA-SCC
Description
Cmos 16-bit Communications Microcontroller
Manufacturer
NXP Semiconductors
Datasheet
1.XA-SCC.pdf
(42 pages)
- Current page: 16 of 42
- Download datasheet (354Kb)
Philips Semiconductors
1999 Feb 23
SCPCFG
SCPD
SCPCS
BDAEE
BDCS
B0CFG
B0AM
B0TMG
B1CFG
B1AM
B1TMG
B2CFG
B2AM
B2TMG
B3CFG
B3AM
B3TMG
B4CFG
B4AM
B4TMG
B5CFG
B5AM
B5TMG
MBCL
RFSH
MSI Control Register
DataMask Register
Hi-Pri Soft Ints & Pin Mux Control Reg.
XInt2
CMOS 16-bit communications microcontroller
MMR Name
Read/Write or
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Memory Interface (MIF) Registers
Miscellaneous Registers
SCP Interface Registers
IDL Interface Registers
Autobaud Registers
Size
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Address
16
Offset
28Ah
28Ch
28Dh
28Eh
2BEh
2BFh
2C0h
2C2h
2D0h
2D2h
260h
262h
263h
270h
272h
280h
281h
282h
284h
285h
286h
288h
289h
290h
291h
292h
294h
295h
296h
SCP Configuration
SCP Data Byte
SCP Control & Status
Autobaud Echo Enable
Autobaud Control & Status
MIF Bank 0 Config
MIF Bank 0 Base Address
MIF Bank 0 Timing Params
MIF Bank 1 Config
MIF Bank 1 Base Address
MIF Bank 1 Timing Params
MIF Bank 2 Config
MIF Bank 2 Base Address
MIF Bank 2 Timing Params
MIF Bank 3 Config
MIF Bank 3 Base Address
MIF Bank 3 Timing Params
MIF Bank 4 Config
MIF Bank 4 Base Address
MIF Bank 4 Timing Params
MIF Bank 5 Config
MIF Bank 5 Base Address
MIF Bank 5 Timing Params
MIF Memory Bank Configuration Lock Register
MIF Refresh Control
IDL Mode Control Register
IDL Mask Register
Control bits for Hi-Priority Soft Ints, and Pin Mux
External Interrupt 2 Control
Description
Preliminary specification
XA-SCC
Reset
0000h
0000h
0000h
Value
00h ..
00h ..
00h..
8xh
00h
0xh
0xh
0xh
0xh
0xh
3Fh
00h
00h
xxh
xxh
xx
—
—
xx
xx
xx
xx
xx
xx
xx
xx
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