XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 20

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XA-SCC

Manufacturer Part Number
XA-SCC
Description
Cmos 16-bit Communications Microcontroller
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
1999 Feb 23
CMOS 16-bit communications microcontroller
NOTE:
During DRAM cycles only, the appropriate CAS Address will be multiplexed onto pins A17–A7 after the assertion or RAS and prior to the assertion of BHE (CASH) and
BLE (CASL). See AC timing diagrams and the XA–SCC User Manual for complete details.
XA–SCC
D15–D0
A19–A0
BHE
CS0
CS1
CS2
CS3
BLE
WE
OE
Figure 5. Typical System Bus Configuration
20
A17–A9
D15–D0
A17–A8
CS
OE
A16–A0
D7–D0
RAS
CASL
CASH
OE
WE
A8–A0
D15–D0
RAS
CASL
CASH
OE
WE
A9–A0
D15–D0
RAS
CASL
CASH
WE
A15–A1
D15–D0
256K x 16 DRAM
32K x 16 SRAM
(MT4C1M16C3)
1M x 16 DRAM
128K x 8 ROM
(HM514260DI)
Preliminary specification
XA-SCC
SU01126

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