CY39100V Cypress Semiconductor Corporation., CY39100V Datasheet - Page 44

• Manufacturer Part Number: CY39100V
• Description: Cplds At Fpga Densities
• Manufacturer: Cypress Semiconductor Corporation.

Package Diagrams
Pin Tables
Table 8. Pin Definition Table
Document #: 38-03039 Rev. *I
Pin Name
GCLK0-3
GCTL0-3
IO/V
IO/V
IO/V
IO/V
IO/V
IO/V
IO/V
IO/V
IO6/Lock
MSEL
GND
IO
REF0
REF1
REF2
REF3
REF4
REF5
REF6
REF7
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Function
Ground
Input
Input
Input
(continued)
Global Clock signals 0 through 3
Global Control signals 0 through 3
Ground
Dual function pin: IO or Reference Voltage for Bank 0
Dual function pin: IO or Reference Voltage for Bank 1
Dual function pin: IO or Reference Voltage for Bank 2
Dual function pin: IO or Reference Voltage for Bank 3
Dual function pin: IO or Reference Voltage for Bank 4
Dual function pin: IO or Reference Voltage for Bank 5
Dual function pin: IO or Reference Voltage for Bank 6
Dual function pin: IO or Reference Voltage for Bank 7
Input or Output pin
Dual function pin: IO in Bank 6 or PLL lock output signal
Mode Select Pin (see Table 9)
676-Ball FBGA (27 x 27 x 1.6 mm) BB676/MB676
Description
Delta39K™ ISR™
51-85125-*B
CPLD Family
Page 44 of 86
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