TDA19997HL NXP Semiconductors, TDA19997HL Datasheet - Page 9

• Manufacturer Part Number: TDA19997HL
• Description: Smart Hdmi 1.4 4 1 Switch With Auto-adaptive Equalizer
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDA19997HL_2
Product data sheet
8.5 Display Data Channel (DDC)
8.6 HDMI features
8.7 +5 V signal detection
8.8 AUX_5V pin
EDID memory accesses are only acknowledged when EDID-only mode is enabled.
Remark: Embedded non-volatile memory content shall be programmed with all
termination resistors disconnected to ensure proper programming.
The DDC-bus is 5 V tolerant and supports all direct connections from the HDMI source.
The TDA19997HL provides level-shifting and buffering for both OUT_DDC_DAT and
OUT_DDC_CLK pins. It allows level-shifting from 5 V on the source side to 3.3 V on the
receiver side.
To prevent a lock-up condition, a specific digital protection is implemented on the
DDC-bus.
Pins RXx_DDC_DAT, RXx_DDC_CLK, OUT_DDC_DAT and OUT_DDC_CLK are
compatible with the I
When the TDA19997HL is not 1.8 V core supplied, pins OUT_DDC_DAT and
OUT_DDC_CLK are high-impedance. In addition, pins RXx_DDC_DAT and
RXx_DDC_CLK are high-impedance when the device is not 5 V supplied.
TDA19997HL acts as a DDC-bus master switch to prevent bus corruption. When the input
selection changes, the upstream DDC-bus communication (using RXx_DDC_DAT and
RXx_DDC_CLK) is disconnected and a stop bit is sent on the downstream DDC-bus
communication (using OUT_DDC_DAT and OUT_DDC_CLK). The DDC-bus is then
connected on the next upstream DDC during a free bus period to avoid bus corruption.
TDA19997HL does not decode Data Island or Deep Color information, it forwards these
packets including null packets.
+5 V signal detection from source is used for activity control through I
bit and an interrupt.
This pin can be used to supply the built-in EDID memory and DDC-bus enabling access to
EDID memory using the DDC-bus without a +5 V signal from any of the input sources.
When pin AUX_5V is powered, the TDA19997HL provides support for HDMI cabled
sources without a +5 V signal. In addition, the AUX_5V supply ensures EDID data stored
in active memory is not lost when a +5 V signal is not available from the input sources.
Input signal detection (+5 V) is also available when AUX_5V pin is powered.
AUX_5V is necessary when using the fifth DDC-bus input (RXE_DDC_DAT,
RXE_DDC_CLK).
•
•
Pins RXx_DDC_DAT and RXx_DDC_CLK at V
Pins OUT_DDC_DAT and OUT_DDC_CLK at V
2
Rev. 02 — 22 December 2009
C-bus specification in Fast-mode (400 kHz):
Smart HDMI 1.4 (4 : 1) switch with auto-adaptive equalizer
DD
DD
= 4.5 V to 5.5 V
= 3.0 V to 3.6 V
TDA19997HL
2
C-bus by setting a
© NXP B.V. 2009. All rights reserved.
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