UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 361
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 361 of 759
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10.9.3 Pulse Width Measurement Operation
input pin (INTP1) pin are measured.
= 12.5 MHz); if shorter than this, the valid edge will not be detected and a capture operation will not be performed.
in synchronization with a valid edge (specified as both rising and falling edges) in the INTP1 pin input, and held there. The
pulse width is obtained from the product of the difference value between the TM2 count value (D
in the CR22 on detection of the nth valid edge and the count value (D
and the number of n-1th count clocks (x/f
In pulse width measurement, the high-level or low-level width of external pulses input to the external interrupt request
Both the high-level and low-level widths of pulses input to the INTP1 pin must be at least 3 system clocks (0.24 s: f
As shown in Figure 10-42, the timer register 2 (TM2) value being counted is fetched into the capture register (CR22)
The control register settings are shown in Figure 10-43, and the setting procedure in Figure 10-44.
Remark Dn: TM2 count value (n = 0, 1, 2, ...)
External Input Signal
Interrupt Request
Capture Register
TM2
Count Value
x = 8, 16, 32, 64, 128, 256, 512, 1024, 2048
(CR22)
INTP1
INTP1
OVF2
0H
Count Start
Figure 10-42 Pulse Width Measurement Timing
Capture
D0
XX
CHAPTER 10 TIMER/COUNTER 2
; x = 8, 16, 32, 64, 128, 256, 512, 1024, 2048).
(D1-D0)
D0
x/f
xx
Capture
D1
n-1
) fetched and held on detection of n-1th valid edge,
FFH
(100H-D1+
D2)
D1
x/f
xx
Cleared by Software
Capture
D2
(D3-D2)
D2
n
) fetched into and held
x/f
xx
Capture
D3
FFH
D3
321
CLK
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