UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 522
UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
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18.3 OPERATION
18.3.1 Clock Output
immediately after the CLE bit is set (1).
output operations are stopped.
not be changed within the same instruction that changes the CLE bit contents).
482
A signal with the clock output frequency selected by bits FS0 to FS2 is selected by selector 1 and output.
The output signal has the same level as the LV bit when the CLE bit is cleared (0), and is output from the clock signal
When the CLE bit is cleared (0), the contents of the LV bit are output in synchronization with the clock signal, and further
Setting of bits FS0 to FS2 and the LV bit should only be performed when CLE = 0 (bits FS0 to FS2 and the LV bit should
<Operation Example>
MOV CLOM, #82H ; CLKOUT pin: high level, clock output: f
SET1 CLE
CLR1 CLE
(a) LV = 0
(b) LV = 1
(n=1,2,4,8,16)
(n=1,2,4,8,16)
CLKOUT
CLKOUT
f
CLK
CLE
f
CLK
/n
CLE
; Starts clock output
; Stops clock output, CLKOUT pin: high level
/n
Figure 18-3 Clock Output Operation Timing
CHAPTER 18 CLOCK OUTPUT FUNCTION
CLK
/4
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