FIDO1100PQF208IR1 Innovasic Semiconductor Inc., FIDO1100PQF208IR1 Datasheet - Page 12

• Manufacturer Part Number: FIDO1100PQF208IR1
• Description: 32-bit Real-time Communications Controller
• Manufacturer: Innovasic Semiconductor Inc.

Flexible Input Deterministic Output (fido ® )
32-Bit Real-Time Communications Controller
2.4
The interface to all external memory. It handles memory interface timing and arbitration of
external bus requests. The external bus interfaces provide all address, data, and control line to
implement either an 8- or 16-bit microcontroller system bus.
2.5
The PMU, UIC, and CPU DMA work together as a fast data transport scheme that requires
minimal Core CPU overhead or intervention.
Memory Protection Unit (MPU)—Access-control method for 16 user-configurable blocks
of internal or external memory on a context basis. A block of memory may be
inaccessible, read only or read/write accessible to a selectable set of contexts. The MPU
provides the space partitioning needed in deterministic, real-time systems.
External Bus Interface
Address/data bus
– 31-bit address bus to access up to 2 Gbytes of memory space
– 8- or 16-bit data bus
– Zero-overhead Endian conversion
Chip Selects—Eight programmable chip selects with programmable size, data width, and
timing.
SDRAM Controller—Supports 8- or 16-bit data interfaces to SDRAM and provides the
necessary control signals to interface to external SDRAM. The interface to the external
SDRAM uses the 16-bit-wide data bus and 13 bits of the address bus of the External Bus
Interface. The dedicated clock signal for this interface (MEMCLK) operates at the same
frequency as the internal master clock.
– Operates at a maximum clock rate of 66 MHz
– Executes read, write, pre-charge, auto refresh, power down, and initialize SDRAM
– Fixed, 4-word bursts to/from SDRAM interface
– Periodically issues auto refresh command to prevent SDRAM data loss
External Bus Arbitration—The fido1100 provides signals to allow it to operate in a multi-
bus master environment.
PMU/UIC/CPU DMA
Peripheral Management Unit (PMU)—A set of user-configurable buffers for data
transmission and reception via the UICs.
Universal Input/Output Controller (UIC)—Programmable protocol engine.
modes
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Page 12 of 81
IA211080807-06
November 20, 2009
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