FIDO1100PQF208IR1 Innovasic Semiconductor Inc., FIDO1100PQF208IR1 Datasheet - Page 51

• Manufacturer Part Number: FIDO1100PQF208IR1
• Description: 32-bit Real-time Communications Controller
• Manufacturer: Innovasic Semiconductor Inc.

Flexible Input Deterministic Output (fido ® )
32-Bit Real-Time Communications Controller
Figures 9 and 10 present the reset timing and extended reset timing diagrams, respectively. The
A_26_SIZE signal is not shown, but it is sampled.
CLK
RESET_N
RESET_OUT_N
RESET_DELAY
ADDR 24:0
DATA 15:0
CS0
CLK
CLK
RESET
RESET_N
RESET_OUT
RESET_OUT_N
RESET_DELAY
RESET_DELAY
ADDR 24:0
ADDR 24:0
DATA 15:0
DATA 15:0
CS0
CS0
CLK
RESET
RESET_OUT
RESET_DELAY
ADDR 24:0
DATA 15:0
CS0
Note: If A25_RESET_DELAY is high at the rising edge of RESET_N,
internal reset and RESET_OUT_N are extended from 100 µs to 20 mS.
The RESET_OUT_N signal is driven low for the determined clock delay
(ADDR 25)
0x000000
0x000000
Clock Running
Clock Running
®
(ADDR 25)
Power On Reset
Power On Reset
100uS
20mS
Figure 10. Extended Reset Timing
Figure 9. Reset Timing
UNCONTROLLED WHEN PRINTED OR COPIED
| <--- Clock Stable
| <--- Clock Stable
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IA211080807-06
0x000000
0x000000
Hardware Reset
Hardware Reset
100uS
20mS
November 20, 2009
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