PHB10N40 NXP Semiconductors, PHB10N40 Datasheet

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PHB10N40

Manufacturer Part Number
PHB10N40
Description
Powermos Transistor
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
GENERAL DESCRIPTION
N-channel
field-effect power transistor in a
plastic envelope suitable for surface
mounting featuring high avalanche
energy capability, stable blocking
voltage, fast switching and high
thermal cycling performance with low
thermal resistance. Intended for use
in Switched Mode Power Supplies
(SMPS), motor control circuits and
general
applications.
PINNING - SOT404
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
THERMAL RESISTANCES
April 1997
PowerMOS transistor
SYMBOL PARAMETER
I
I
P
V
E
I
T
SYMBOL
R
R
D
DM
AS
PIN
P
j
D
GS
AS
mb
, T
th j-mb
th j-a
1
2
3
D
/ T
stg
mb
gate
drain
source
drain
Continuous drain current
Pulsed drain current
Total dissipation
Linear derating factor
Gate-source voltage
Single pulse avalanche
energy
Peak avalanche current
Operating junction and
storage temperature range
purpose
enhancement
DESCRIPTION
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
switching
mode
QUICK REFERENCE DATA
PIN CONFIGURATION
SYMBOL
V
I
P
R
D
CONDITIONS
T
T
T
T
T
V
V
V
V
DS
tot
DS(ON)
mb
mb
mb
mb
mb
DD
GS
DD
GS
= 25 ˚C; V
= 100 ˚C; V
= 25 ˚C
= 25 ˚C
> 25 ˚C
= 10 V
= 10 V
1
50 V; starting T
50 V; starting T
2
CONDITIONS
pcb mounted, minimum
footprint
3
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Drain-source on-state resistance
GS
1
GS
= 10 V
mb
= 10 V
j
j
= 25˚C; R
= 25˚C; R
GS
GS
= 50 ;
= 50 ;
SYMBOL
TYP.
50
-
MIN.
- 55
g
-
-
-
-
-
-
-
-
Product specification
MAX.
0.85
-
MAX.
MAX.
1.176
10.7
0.55
d
10.7
400
147
s
147
520
150
PHB10N40
6.7
43
10
30
Rev 1.000
UNIT
K/W
K/W
UNIT
UNIT
W/K
mJ
˚C
W
W
V
A
A
A
A
V
A

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PHB10N40 Summary of contents

Page 1

... ˚ > 25 ˚ starting T = 25˚ starting T = 25˚ CONDITIONS pcb mounted, minimum footprint 1 Product specification PHB10N40 MAX. UNIT 400 10.7 147 0.55 SYMBOL MIN. MAX. UNIT - 10 147 - 1.176 W ...

Page 2

... Measured from source lead solder point to source bond pad MHz GS DS CONDITIONS T = 25˚ 25˚ dI/dt = 100 Product specification PHB10N40 MIN. TYP. MAX. UNIT 400 - - V - 0.4 - V/K - 0.42 0.55 2.0 3.0 4.0 V 3.5 6 ...

Page 3

... V GS RDS(on), Drain-Source on resistance (Ohms) BUK457-400B 1 0 100 100 ms 0.2 0 1000 ˚ Product specification PHB10N40 Zth j-mb / (K/W) BUKx57- 0.5 0.2 0.1 0.05 0. 1E-05 1E-03 1E- Fig.4. Transient thermal impedance f(t); parameter j-mb ...

Page 4

... 1E-04 1E-05 1E- 10000 1000 100 10 80 100 120 140 Fig.12. Typical capacitances f Product specification PHB10N40 VGS(TO max. typ. min. -40 - 100 120 140 Fig.10. Gate threshold voltage . = f(T ); conditions 0.25 mA SUB-THRESHOLD CONDUCTION ...

Page 5

... Fig.17. Normalised unclamped inductive energy VGS 0 100 150 Fig.18. Unclamped inductive test circuit Product specification PHB10N40 PHP10N40 VGS = 0 V 150 0.2 0.4 0.6 0.8 1 1.2 VSDS, Source-Drain voltage (Volts f(V ); parameter T F SDS j EAS, Normalised unclamped inductive energy (%) ...

Page 6

... Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Epoxy meets UL94 V0 at 1/8". April 1997 10.3 max 11 max 15.4 0.85 max (x2) Fig.19. SOT404 : centre pin connected to mounting base. 11.5 9.0 2.0 3.8 5.08 Fig.20. SOT404 : soldering pattern for surface mounting . 6 Product specification PHB10N40 4.5 max 1.4 max 2.5 0.5 17.5 Rev 1.000 ...

Page 7

... Philips customers using or selling these products for use in such applications their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1997 7 Product specification PHB10N40 Rev 1.000 ...

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