ST92195C STMicroelectronics, ST92195C Datasheet - Page 64
ST92195C
Manufacturer Part Number
ST92195C
Description
48-96 Kbyte Rom Hcmos Mcu With On-screen Display And Teletext Data Slicer
Manufacturer
STMicroelectronics
Datasheet
1.ST92195C.pdf
(249 pages)
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ST92195C/D - TIMING AND CLOCK CONTROLLER
5 TIMING AND CLOCK CONTROLLER
5.1 FREQUENCY MULTIPLIERS
Three on-chip frequency multipliers generate the
proper frequencies for: the Core/Real time Periph-
erals, the Display related time base and the Slicer
over-sampling clock for the Teletext Data slicer.
Figure 32. Timing and Clock Controller Block Diagram
64/249
OSCOUT
OSCIN
PXFM
MCFM
Async.
Handler
SLDIV2
Oscillator
Divide
Xtal
by 2
SKWEN
FMEN
FMSL
Frequency
FMEN
Multiplier
Frequency
Multiplier
SKWL(3:0)
4 MHz real time Clock
FML(3:0)
Main Clock Controller
Asynch.
Handler
Divide
by 2
Fimf
Skew Corrector
Hsync
TXCF
Divide
by 64
(Synchronized DOTCK)
For both the Core and the Display frequency mul-
tipliers, a 4 bit programmable feed-back counter
allows the adjustment of the multiplying factor to
the application need (a 4 MHz or 8 MHz crystal is
assumed).
MODER.5
Div-2
ST9 Clock Control Unit (RCCU)
SLIEN
Frequency
( x 777 )
Multiplier
SKHPLS
Divide
Divide
by 2
by 2
Prescaler
SKDIV2
SKDIV2
1 to 8
(2X Pixel clock for 1X width characters)
Synchronized DOTCK / 2 to Display
to Teletext Display Storage RAM (TRI)
to CSYNC Controller,
SYNC Extractor, ..
Memory Wait
Control
Clock
48.56 MHz Clock
(Teletext SLicer)
BREQ
WFI
VR02095A
INTCLK
CPUCLK
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