CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 45

• Manufacturer Part Number: CMX980AL7
• Description: TETRA Baseband Processor
• Manufacturer: CML Microcircuits

TETRA Baseband Processor
Title:
Address:
Function:
Description:
7:6
Bit
5
4
3
2
1
1999 Consumer Microcircuits Limited
FirReset
DigLoopBack
AnaLoopBack
RxDPAccessSel
TxDPAccessSel
LoopBackCtrl
LoopBack Control register
$0x0D
RW
This register is only used for test purposes. For normal operation all these bits should be
inactive.
Name
High
High
High
High
High
Active State
RW
RW
RW
RW
RW
RW
Reserved. These bits should be set Low. Undefined on
read.
When active, this bit holds all FIR filters in reset, by
resetting the FIR address pointers. This by itself does not
reset the data register RAMs. A separate access is
provided to disable the complete Tx or Rx Data path.
Taking N_RESET Low will also reset the FIR filter
coefficients to their default values.
When set active this bit enables the digital loopback
feature. This connects the output of the final Rx Data path
63-tap FIR filter to the input of the Tx Data path 63-tap FIR
filter, thereby allowing an analogue signal presented at the
Rx inputs to be filtered by a raised cosine filter and
monitored at the Tx outputs as an analogue signal.
When set active this bit enables the analogue loopback
feature. This connects the output of the Tx Data path DAC
to the input of the Rx Data path ADC, thus passing transmit
constellation data through a raised cosine filter and allowing
the resultant data samples to be monitored digitally at the
Rx output.
When set active this bit disables the Rx Data path sample
clock, thereby enabling the Data path access register to
directly update the output of the Rx Data path operator.
When set active this bit disables the Tx Data path sample
clock, thereby enabling the Data path access register to
directly update the input to the Sigma-Delta DAC without
the data being overridden by subsequent sample clocks
45
Function
CMX980A
D/980A/3