CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 53

• Manufacturer Part Number: CMX980AL7
• Description: TETRA Baseband Processor
• Manufacturer: CML Microcircuits

TETRA Baseband Processor
Title:
Address:
Function:
Description:
Bit
7
6
5
4
3
2
1
0
1999 Consumer Microcircuits Limited
n_TxPathEn_Mask
n_FIFOUnderRead_Mask
n_FIFOOverWrite_Mask
n_FIFOFull_Mask
n_FIFONearlyFull_Mask
n_FIFONearlyEmpty_Mask
n_FIFOEmpty_Mask
TxFIFOStatMask
Transmit data FIFO Status interrupt Mask register
$0x23
RW
Masks interrupts in the TxFIFOStatus Register. On taking N_RESET Low, these bits are set
active, so masking out all possible interrupt sources. Each inactive bit will allow its associated
status bit to generate an interrupt. In the case of the status bits marked in the TxFIFOStatus
Register with a parenthesised ‘L’, taking the mask bit inactive will enable the latching
mechanism.
Name
0
1
Address field [6:0]
Address and Data format for TxFIFOStatMask access
0
0
0
Low
Low
Low
Low
Low
Low
Low
Data
Active State
1
RW
RW
RW
RW
RW
RW
RW
RW
1
53
Tx Data path active interrupt mask bit.
FIFO underflow interrupt mask bit.
FIFO overflow interrupt mask bit.
FIFO full interrupt mask bit.
FIFO nearly full interrupt mask bit.
FIFO nearly empty interrupt mask bit.
FIFO empty interrupt mask bit.
Reserved for manufacturer’s test purposes. This
bit should be set Low.
D7 D6 D5 D4 D3 D2
Data field [7:1]
Function
D1
R
CMX980A
D/980A/3