CMX980AL7 CML Microcircuits, CMX980AL7 Datasheet - Page 77

• Manufacturer Part Number: CMX980AL7
• Description: TETRA Baseband Processor
• Manufacturer: CML Microcircuits

TETRA Baseband Processor
Title:
Address:
Function:
Description:
Bit
7
1999 Consumer Microcircuits Limited
6
5
4
3
2
1
0
TestCompleteAck
n_RampDelayEn
BISTDataRateHi
BISTEn
ContinuousBIST
EnRxDigitalFeedBack High
En63tlQData
EnSymTestData
BISTControl
Built In Self Test Control register
$0x62
RW
This register block allows control of BIST operations.
Name
1
1
Address field [6:0]
0
Address and Data format for BistControl access
High/
Low
Low
High
High
High
High
High
Active State
0
0
RW
RW
RW
RW
RW
RW
RW
RW
1
0
This bit is set by the user and cleared by the BIST
controller when a BIST cycle has been completed.
Allow Ramp control signal delay. This delay is required
for normal operations, by matching the FIR filter delays.
For BIST operations it can be disabled thus reducing BIST
test time.
Selects BIST data rate = MCLK/4
Default rate (Low)
Enables BIST operations and starts BIST master clock.
Selects continuous BIST mode.
Default (Low) selects single cycle mode.
Selects Rx digital loop feedback for 63-tap Tx RRC FIR
input data. Default (Low) selects normal Tx data.
Selects BIST data for 63-tap Tx FIR filter input.
Default (Low) selects normal data.
Selects BIST data for 79-tap FIR filter input.
Default (Low) selects normal data.
77
D7 D6 D5 D4 D3 D2
Data field [7:0]
Function
= MCLK/64
D1 D0
CMX980A
D/980A/3