AD9248-40PCB Analog Devices, AD9248-40PCB Datasheet - Page 19
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AD9248-40PCB
Manufacturer Part Number
AD9248-40PCB
Description
14-Bit/ 20/40/65 MSPS Dual A/ D Converter
Manufacturer
Analog Devices
Datasheet
1.AD9248-40PCB.pdf
(23 pages)
Preliminary Technical Data
VOLTAGE REFERENCE
A stable and accurate 0.5 V voltage reference is built into the
AD9248. The input range can be adjusted by varying the
reference voltage applied to the AD9248, using either the
internal reference with different external resistor configurations
or an externally applied reference voltage. The input span of
the ADC tracks reference voltage changes linearly.
If the ADC is being driven differentially through a transformer,
the reference voltage can be used to bias the center tap
(common mode voltage).
The Shared Reference mode allows the user to connect the
references from the dual ADCs together externally for superior
gain and offset matching performance. If the ADCs are to
function independently, the reference decoupling can be treated
independently and can provide superior isolation between the
dual channels. To enable Shared Reference mode, the
SHARED_REF pin must be tied high and external differential
references must be externally shorted. (REFT_A must be
externally shorted to REFT_B and REFB_A must be shorted to
REFB_B.)
Internal Reference Connection
A comparator within the AD9248 detects the potential at the
SENSE pin and configures the reference into four possible
states, which are summarized in Table 8. If SENSE is
grounded, the reference amplifier switch is connected to the
internal resistor divider (see Figure 4), setting V
Connecting the SENSE pin to V
amplifier output to the SENSE pin,
Table 8. Reference Configuration Summary
Selected Mode
External Reference
Internal Fixed Reference
Programmable Reference
Internal Fixed Reference
External Reference Operation
The use of an external reference may be necessary to enhance
the gain accuracy of the ADC or to improve thermal drift
characteristics. When multiple ADCs track one another, a
single reference (internal or external) may be necessary to
reduce gain matching errors to an acceptable level. A high
precision external reference may also be selected to provide
lower gain and offset temperature drift. Figure 10 shows the
typical drift characteristics of the internal reference in both 1 V
and 0.5 V modes. When the SENSE pin is tied to AVDD, the
internal reference will be disabled, allowing the use of an
external reference. An internal reference buffer will load the
external reference with an equivalent 7 k? load. The internal
buffer will still generate the positive and negative full-scale
references, REFT and REFB, for the ADC core. The input span
will always be twice the value of the reference voltage;
therefore, the external reference must be limited to a maximum
REF
switches the reference
SENSE Voltage
AVDD
V
0.2 V to V
AGND to 0.2 V
REF
REF
REF
to 1 V.
Rev. PrE | Page 19 of 23
Resulting V
N/A
0.5
0.5 × (1 + R2/R1)
1.0
completing the loop and providing a 0.5 V reference output. If
a resistor divider is connected as shown in Figure , the switch
will again be set to the SENSE pin. This will put the reference
amplifier in a noninverting mode with the V
as follows:
In all reference configurations, REFT and REFB drive the ADC
core and establish its input span. The input range of the ADC
always equals twice the voltage at the reference pin for either
an internal or an external reference.
of 1 V. If the internal reference of the AD9248 is used to drive
multiple converters to improve gain matching, the loading of
the reference by the other converters must be considered.
Figure depicts how the internal reference voltage is affected by
loading.
V
REF
0
REF
.
5
Figure 4.
(V)
1
R
2
Internal Reference Configuration
R
1
Resulting Differential
Span (V
2 × External Reference
1.0
2 × V
2.0
REF
AD9248
P-P
(See Figure )
)
AD9248
REF
output defined