HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 40

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

863 C ]Y^Y
Configuration and status registers
Name
MST_MODE0
*
Auxiliary channel handling
To support an automatic codec to codec connection AUX1_D and AUX2_D can be set into mirror
mode. In this case if the data registers AUX1_D and AUX2_D are not overwritten, the transmisson
slots AUX1_SSL and AUX2_SSL mirror the data received in AUX1_RSL and AUX2_RSL slots.
This is useful for an internal connection between two CODECs. This mirroring is enabled by
setting bits 1..0 in MST_MODE1 register
*
If no external clock source is connected to C4IO and F0IO bit 0 of MST_MODE0 must be set for
normal operation.
note!
important!
The pulse shape and polarity of the codec signals F1_A and F1_B is the same as the
pulseshape of the F0IO signal. The polarity of C2O can be changed by bit 1.
RESET sets register MST_MODE0, MST_MODE1 and MST_MODE2 to all '0's.
Addr.
14h
Bits
5..4
7..4
1
2
3
0
r/w Function
w
w
w
w
w
PCM/GCI/IOM2 bus mode
'0' slave (reset default) (C4IO and F0IO are inputs)
'1' master (C4IO and F0IO are outputs)
polarity of C4- and C2O-clock
'0' F0IO is sampled on negative clock transition
'1' F0IO is sampled on positive clock transition
polarity of F0-signal
'0' F0 positive pulse
'1' F0 negative pulse
duration of F0-signal
'0' F0 active for one C4-clock (244ns) (reset default)
'1' F0 active for two C4-clocks (488ns)
time slot for codec-A signal F1_A
'00'
'01'
'10'
'11'
time slot for codec-B signal F1_B
'00'
'01'
'10'
'11'
B1 receive slot
B2 receive slot
AUX1 receive slot
signal C2O
B1 receive slot
B2 receive slot
AUX1 receive slot
AUX2 receive slot
pin F1_A (C2O is 1/2 C4O)
Cologne
Chip