HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 50

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

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6
6.1
6.1.1 Register read access in de-multiplexed Motorola mode (mode 2)
Timing diagram 1: Register read access in de-multiplexed Motorola mode (mode 2)
SYMBOL
t
t
t
t
t
t
t
t
t
RD
RDD
RDDH
SA
SAH
WR
WRDSU
WRDH
CYCLE
Timing characteristics
Microprocessor access
Read Time
/DS Low to Read Data Out Time
/DS High to Data Buffer Turn Off Time
Address to /DS Low Setup Time
Address Hold Time after /DS High
Write Time
Write Data Setup Time to /DS High
Write Data Hold Time from /DS High
End of Read Data Cycle to End of Next Read/Write Data Cycle
Time
CHARACTERISTICS
6x t
MIN.
30ns
50ns
20ns
20ns
50ns
10ns
3ns
2ns
CLKI
Cologne
Chip
MAX.
25ns
15ns
–
–
–