HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 6

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

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Features
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The HFC-S mini is a single-chip ISDN S/T HDLC basic rate controller for embedded applications.
The S/T interface, HDLC-controllers, FIFOs and a microprocessor interface are integrated in the HFC-S
mini. A PCM128 / PCM64 / PCM30 interface is also implemented which can be connected to many
telecom serial busses. CODECs are usually connected to this interface. All ISDN channels (2B+1D) and
the PCM interface are served fully duplex by the 8 integrated FIFOs.
HDLC controllers are implemented in hardware so there is no need to implement HDLC on the host
processor.
single chip ISDN-S/T-controller with B- and D-channel HDLC support
integrated S/T interface
full I.430 ITU S/T ISDN support in TE and NT mode for 3.3V and 5V power supply
independent read and write HDLC-channels for 2 ISDN B-channels, one ISDN D-channel and
one PCM timeslot (or E-channel)
B1- and B2-channel transparent mode independently selectable
integrated FIFOs for B1, B2, D and PCM (or E)
FIFO size: 128 bytes per channel and direction; up to 7 HDLC frames per FIFO
56 kbit/s restricted mode for U.S. ISDN lines selectable by software
PCM128 / PCM64 / PCM30 interface configurable to interface MITEL ST
Siemens IOM2
H.100 data rate supported
microprocessor interface compatible to Motorola bus and Intel bus
Timer with interrupt capability
CMOS technology, 3V - 5V
PQFP 48 case
General description
TM
or GCI
TM
for interface to U-chip or external CODECs
TM
bus (MVIP
Cologne
Chip
TM
),