WM8594_07 Wolfson Microelectronics Ltd., WM8594_07 Datasheet - Page 68
WM8594_07
Manufacturer Part Number
WM8594_07
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet
1.WM8594_07.pdf
(78 pages)
- Current page: 68 of 78
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WM8594
R35 (23h) – Bias Control Register (BIAS)
Figure 49 R35 – Bias Control Register
w
Default
Default
Write
Write
Read
Read
Bit #
Bit #
VMID_SEL[1:0]
BUFIO_EN
POBCTRL
VMIDTOG
FAST_EN
SOFT_ST
BIAS_EN
Function
N/A
15
0
7
0
0
VMID_SEL[1:0]
Bias Source for Output Amplifiers
0 = Output amplifiers use master bias
1 = Output amplifiers use fast bias
VMID Power Down Characteristic
0 = Slow ramp
1 = Fast ramp
Fast Bias Enable
0 = Fast bias disabled
1 = Fast bias enabled
VMID Buffer Enable
0 = VMID Buffer disabled
1 = VMID Buffer enabled
VMID Soft Ramp Enable
0 = Soft ramp disabled
1 = Soft ramp enabled
Master Bias Enable
0 = Master bias disabled
1 = Master bias enabled
Also powers down ADCVMID
VMID Resistor String Value Selection (DACVMID only)
00 = off (no VMID)
01 = 100kΩ
10 = 500kΩ
11 = 10kΩ
The selection is the total resistance of the string from DACREFP to DACREFN. The ADCVMID
resistance is fixed at 200kΩ.
N/A
14
0
0
6
0
BIAS_EN
N/A
13
0
0
5
0
SOFT_ST
N/A
12
0
0
4
1
Description
BUFIO_EN
N/A
11
0
3
0
0
N/A = Not Applicable (no function implemented)
FAST_EN
N/A
10
0
0
2
0
VMIDTOG
PP Rev 1.0 January 2007
N/A
9
0
0
1
0
Product Preview
POBCTRL
N/A
8
0
0
0
0
68
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