WM8978_06 Wolfson Microelectronics Ltd., WM8978_06 Datasheet - Page 20
WM8978_06
Manufacturer Part Number
WM8978_06
Description
Stereo Codec With Speaker Driver
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet
1.WM8978_06.pdf
(119 pages)
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WM8978
w
Figure 8 Typical Power up Sequence where DVDD is Powered before AVDD
Table 3 Typical POR operation (typical simulated values)
Figure 8 shows a typical power-up sequence where DVDD comes up first. First it is assumed that
DVDD is already up to specified operating voltage. When AVDD goes above the minimum threshold,
V
in reset. In this condition, all writes to the control interface are ignored. When AVDD rises to V
PORB is released high and all registers are in their default state and writes to the control interface
may take place.
On power down, where DVDD falls first, PORB is asserted low whenever DVDD drops below the
minimum threshold V
Notes:
1.
2.
3.
pora
SYMBOL
V
V
V
V
V
pora_on
pora_off
pord_on
pord_off
, there is enough voltage for the circuit to guarantee PORB is asserted low and the chip is held
If AVDD and DVDD suffer a brown-out (i.e. drop below the minimum recommended operating
level but do not go below V
operation when the voltage is back to the recommended level again.
The chip will enter reset at power down when AVDD or DVDD falls below V
This may be important if the supply is turned on and off frequently by a power management
system.
The minimum t
specification is guaranteed by design rather than test.
pora
MIN
0.4
0.9
0.4
0.5
0.4
por
pord_off
TYP
0.6
1.2
0.6
0.7
0.6
period is maintained even if DVDD and AVDD have zero rise time. This
.
pora_off
MAX
0.8
1.6
0.8
0.9
0.8
or V
UNIT
pord_off
V
V
V
V
V
) then the chip will not reset and will resume normal
PP Rev 3.0 May 2006
pora_off
Pre-Production
or V
pora_on
pord_off
20
,
.
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