WM8978_06 Wolfson Microelectronics Ltd., WM8978_06 Datasheet - Page 96

• Manufacturer Part Number: WM8978_06
• Description: Stereo Codec With Speaker Driver
• Manufacturer: Wolfson Microelectronics Ltd.

WM8978
w
7 (07h)
8 (08h)
REGISTER
ADDRESS
4:2
1
0
8:4
3:1
0
8:6
5:4
3
2:0
BIT
BCLKDIV
MS
SR
SLOWCLKEN
OPCLKDIV
GPIO1POL
GPIO1SEL
[2:0]
LABEL
000
0
0
00000
000
0
000
00
0
000
DEFAULT
Configures the BCLK output frequency, for use
when the chip is master over BCLK.
000=divide by 1 (BCLK=MCLK)
001=divide by 2 (BCLK=MCLK/2)
010=divide by 4
011=divide by 8
100=divide by 16
101=divide by 32
110=reserved
111=reserved
Reserved
Sets the chip to be master over LRC and BCLK
0=BCLK and LRC clock are inputs
1=BCLK and LRC clock are outputs generated
by the WM8978 (MASTER)
Reserved
Approximate sample rate (configures the
coefficients for the internal digital filters):
000=48kHz
001=32kHz
010=24kHz
011=16kHz
100=12kHz
101=8kHz
110-111=reserved
Slow clock enable. Used for both the jack insert
detect debounce circuit and the zero cross
timeout.
0 = slow clock disabled
1 = slow clock enabled
Reserved
PLL Output clock division ratio
00=divide by 1
01=divide by 2
10=divide by 3
11=divide by 4
GPIO1 Polarity invert
0=Non inverted
1=Inverted
CSB/GPIO1 pin function select:
000= input (CSB/jack detection: depending on
MODE setting)
001= reserved
010=Temp ok
011=Amute active
100=PLL clk o/p
101=PLL lock
110=logic 1
111=logic 0
DESCRIPTION
PP Rev 3.0 May 2006
Digital Audio
Interfaces
Digital Audio
Interfaces
Audio Sample
Rates
Analogue
Outputs
General
Purpose
Input/Output
(GPIO)
General
Purpose
Input/Output
(GPIO)
General
Purpose
Input/Output
(GPIO)
Pre-Production
REFER TO
96