MCIMX31 Motorola Semiconductor Products, MCIMX31 Datasheet - Page 41

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MCIMX31

Manufacturer Part Number
MCIMX31
Description
Manufacturer
Motorola Semiconductor Products
Datasheet

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Figure
basic WEIM accesses to external memory devices with the timing parameters mentioned in
Table 33
Freescale Semiconductor
27,
1
2
3
WE10
WE11
WE12
WE13
WE14
WE15
WE16
WE17
WE18
WE19
WE20
WE21
WE22
WE23
for specific control parameter settings.
Applies to rising edge timing
BCLK parameters are being measured from the 50% VDD.
The actual cycle time is derived from the AHB bus clock frequency.
WE8
WE9
ID
Figure
High is defined as 80% of signal value and low is defined as 20% of signal
value.
Test conditions: load capacitance, 25 pF. Recommended drive strength for all
controls, address, and BCLK is Max drive.
Clock rise/fall to OE Invalid
Clock rise/fall to EB[x] Valid
Clock rise/fall to EB[x] Invalid
Clock rise/fall to LBA Valid
Clock rise/fall to LBA Invalid
Clock rise/fall to Output Data Valid
Clock rise to Output Data Invalid
Input Data Valid to Clock rise, FCE=0
Clock rise to Input Data Invalid, FCE=0
ECB setup time, FCE=0
ECB hold time, FCE=0
DTACK setup time
DTACK hold time
BCLK High Level Width
BCLK Low Level Width
BCLK Cycle time
28,
Figure
Table 33. WEIM Bus Timing Parameters (continued)
29,
FCE=1
MCIMX31/MCIMX31L Advance Information, Rev. 3.2
FCE=1
1
2
1
Figure
Preliminary—Subject to Change Without Notice
2, 3
2, 3
Parameter
30,
FCE=1
FCE=1
Figure
NOTE
31, and
Figure 32
depict some examples of
–2.5
–2.5
Min
2.5
6.5
3.5
4.5
–3
–3
–3
–3
–3
–2
–2
–2
15
8
2
0
T/2 – 3
T/2 – 3
Electrical Characteristics
Max
3
3
3
3
3
4
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
41

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