ADA4937-1 Analog Devices, ADA4937-1 Datasheet - Page 18

• Manufacturer Part Number: ADA4937-1
• Description: Ultra-Low Distortion Differential ADC Driver
• Manufacturer: Analog Devices

ADA4937-1
THEORY OF OPERATION
The ADA4937-1 differs from conventional op amps in that it
has two outputs whose voltages move in opposite directions.
Like an op amp, it relies on open-loop gain and negative
feedback to force these outputs to the desired voltages. The
ADA4937-1 behaves much like a standard voltage feedback op
amp and makes it easier to perform single-ended-to-differential
conversions, common-mode level shifting, and amplifications
of differential signals. Also like an op amp, the ADA4937-1 has
high input impedance and low output impedance.
Two feedback loops are employed to control the differential and
common-mode output voltages. The differential feedback, set
with external resistors, controls only the differential output
voltage. The common-mode feedback controls only the common-
mode output voltage. This architecture makes it easy to set the
output common-mode level to any arbitrary value. It is forced,
by internal common-mode feedback, to be equal to the voltage
applied to the V
output voltage.
The ADA4937-1 architecture results in outputs that are highly
balanced over a wide frequency range without requiring tightly
matched external components. The common-mode feedback
loop forces the signal component of the output common-
mode voltage to zero. This results in nearly perfectly balanced
differential outputs that are identical in amplitude and are
exactly 180° apart in phase.
ANALYZING AN APPLICATION CIRCUIT
The ADA4937-1 uses open-loop gain and negative feedback to
force its differential and common-mode output voltages in such
a way as to minimize the differential and common-mode error
voltages. The differential error voltage is defined as the voltage
between the differential inputs labeled +IN and −IN (see
Figure 46). For most purposes, this voltage can be assumed to
be zero. Similarly, the difference between the actual output
common-mode voltage and the voltage applied to V
be assumed to be zero. Starting from these two assumptions,
any application circuit can be analyzed.
Table 8. Output Noise Voltage Density Calculations
Input Noise Contribution
Differential Input
Inverting Input
Noninverting Input
V
Gain Resistor R
Gain Resistor R
Feedback Resistor R
Feedback Resistor R
OCM
Input
G1
G2
OCM
F1
F2
input, without affecting the differential
Input Noise Term
v
i
i
v
v
v
v
v
nIN−
nIN+
nIN
nCM
nRG1
nRG2
nRF1
nRF2
OCM
can also
Input Noise
Voltage Density
v
i
i
v
(4kTR
(4kTR
(4kTR
(4kTR
nIN−
nIN+
nIN
nCM
Rev. 0 | Page 18 of 28
× (R
× (R
G1
G2
F1
F2
)
)
)
)
1/2
1/2
1/2
1/2
G2
G1
||R
||R
F2
F1
)
)
SETTING THE CLOSED-LOOP GAIN
The differential-mode gain of the circuit in Figure 46 can be
determined by
This assumes the input resistors ( R
on each side are equal.
ESTIMATING THE OUTPUT NOISE VOLTAGE
The differential output noise of the ADA4937-1 can be
estimated using the noise model in Figure 47. The input-
referred noise voltage density, v
input, and the noise currents, i
each input and ground. The noise currents are assumed to be
equal and produce a voltage across the parallel combination of
the gain and feedback resistances. v
density at the V
(4kTR
multiplication factors, and the output-referred noise density terms.
V
V
x
Output
Multiplication Factor
G
G
G
G
G
G
1
1
)
OUT
1/2
IN
N
N
N
N
N
N
(β
(1 − β
(1 − β
,
. Table 8 summarizes the input noise sources, the
dm
,
dm
1
− β
V
V
nRG1
nRG2
=
2
1
OCM
2
)
)
)
R
R
Figure 47. ADA4937-1 Noise Model
G
F
R
R
pin. Each of the four resistors contributes
i
i
G1
G2
nIN+
nIN–
V
nIN
R
R
F1
F2
nIN−
ADA4937-1
nIN
+
, is modeled as a differential
and i
G
nCM
V
V
) and feedback resistors ( R
V
Output Noise
Voltage Density Term
v
v
v
v
v
v
v
v
nRF1
OCM
nRF2
nO1
nO2
nO3
nO4
nO5
nO6
nO7
nO8
is the noise voltage
nIN+
= G
= G
= G
= G
= G
= G
= (4kTR
= (4kTR
, appear between
N
N
N
N
N
N
(v
[i
[i
(β
(1 − β
(1 − β
V
nIN−
nIN+
nIN
nOD
1
V
F1
F2
− β
nCM
)
)
)
× (R
× (R
1/2
1/2
2
1
)(4kTR
)(4kTR
2
)(v
G2
G1
nCM
||R
||R
)
G1
G2
F2
F1
)]
)]
)
)
1/2
1/2
F
)