MPC8548E Freescale, MPC8548E Datasheet - Page 7
![no-image](/images/manufacturer_photos/0/2/261/freescale_sml.jpg)
MPC8548E
Manufacturer Part Number
MPC8548E
Description
Integrated Processor
Manufacturer
Freescale
Datasheet
1.MPC8548E.pdf
(142 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8548ECEPXAUJB
Manufacturer:
FREESCAL
Quantity:
745
Company:
Part Number:
MPC8548ECHXAQG
Manufacturer:
FREESCAL
Quantity:
853
Company:
Part Number:
MPC8548ECHXAQG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8548ECHXAUJ
Manufacturer:
MOT
Quantity:
12 388
Company:
Part Number:
MPC8548ECHXAUJ
Manufacturer:
FREESCAL
Quantity:
591
Company:
Part Number:
MPC8548ECPXAQGB
Manufacturer:
FREESCAL
Quantity:
648
Company:
Part Number:
MPC8548ECPXAQGB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8548ECPXATGB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8548ECPXAUJB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8548ECVTAQGB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8548ECVTAUJB
Manufacturer:
FREESCALE
Quantity:
20 000
www.DataSheet4U.com
Freescale Semiconductor
•
•
•
— Buffer descriptors backward compatible with MPC8260 and MPC860T 10/100 Ethernet
— RMON statistics support
— 10-Kbyte internal transmit and 2-Kbyte receive FIFOs
— MII management interface for control and status
— Ability to force allocation of header information and buffer descriptors into L2 cache
OCeaN switch fabric
— Full crossbar packet switch
— Reorders packets from a source based on priorities
— Reorders packets to bypass blocked packets
— Implements starvation avoidance algorithms
— Supports packets with payloads of up to 256 bytes
Integrated DMA controller
— Four-channel controller
— All channels accessible by both the local and remote masters
— Extended DMA functions (advanced chaining and striding capability)
— Support for scatter and gather transfers
— Misaligned transfer capability
— Interrupt on completed segment, link, list, and error
— Supports transfers to or from any local memory or I/O port
— Selectable hardware-enforced coherency (snoop/no snoop)
— Ability to start and flow control each DMA channel from external 3-pin interface
— Ability to launch DMA from single write transaction
Two PCI/PCI-X controllers
— PCI 2.2 and PCI-X 1.0 compatible
— One 32-/64-bit PCI/PCI-X port with support for speeds of up to 133 MHz (maximum PCI-X
— One 32-bit PCI port with support for speeds from 16 to 66 MHz (available when the other port
— Host and agent mode support
— 64-bit dual address cycle (DAC) support
— PCI-X supports multiple split transactions
— Supports PCI-to-memory and memory-to-PCI streaming
– VRRP and HSRP support for seamless router fail-over
– Up to 16 exact-match MAC addresses supported
– Broadcast address (accept/reject)
– Hash table match on up to 512 multicast addresses
– Promiscuous mode
programming models
frequency in synchronous mode is 110 MHz)
is in 32-bit mode)
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 4
Overview
7