MD3331-D32-V3Q18 M-Systems Inc., MD3331-D32-V3Q18 Datasheet - Page 63

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MD3331-D32-V3Q18

Manufacturer Part Number
MD3331-D32-V3Q18
Description
Mobile Diskonchip Plus 128Mbits 1.8V I/o
Manufacturer
M-Systems Inc.
Datasheet

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10.4.6 Interrupt Timing
The interrupt timing is illustrated in Figure 25, and described in Table 23.
63
IRQ#
1. Specified from the final positive crossing of Vcc above 2.5V and VCCQ above 1.65 or 2.5V.
2. If the assertion of RSTIN# occurs during a flash erase cycle, this time could be extended by up to 500 µS.
3. Normal read/write cycle timing applies. This parameter applies only when the cycle is extended until the negation of the BUSY#
signal.
4. Applies to multiplexed interface only.
5. When operating DiskOnChip with separate power supplies for VCC and VCCQ, it is recommended to turn both power supplies
on and off simultaneously. Providing power separately (either at power-on or power-off) can cause excessive power dissipation.
Damage to the device may result if this condition persists for more than 1 second.
T
Tw(IRQ)
Symbol
Tp (VCC-BUSY0)
Tho(RSTIN-AVD)
REC
T
T
HO
SU
T
T
T
P
W
P
(VCC-RSTIN)
Symbol
(BUSY-CE)
(D-BUSY1)
(BUSY1)
(BUSY0)
(RSTIN)
2
3
3
1
4
IRQ# asserted pulse width (edge mode)
1
Figure 25: IRQ# Pulse Width in Edge Mode
Table 22: Power-Up Timing Parameters
VCC/VCCQ stable to RSTIN#
VCC/VCCQ stable to BUSY#
RSTIN# asserted pulse width
RSTIN#
RSTIN#
RSTIN#
Data valid to BUSY#
BUSY#
Table 23: Interrupt Timing
Description
Data Sheet, Rev. 1.7
Description
to AVD# low hold
to BUSY#
to BUSY#
to CE#
Tw(IRQ)
Min
Mobile DiskOnChip Plus 16/32MByte 1.8V I/O
500
30
70
0
0
Min
300
Max
500
1.3
50
Max
800
Units
ms
µs
µs
ns
ns
ns
ns
ns
Units
nS
95-SR-000-10-8L

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