ADC1210S NXP Semiconductors, ADC1210S Datasheet - Page 14

• Manufacturer Part Number: ADC1210S
• Description: Single 12-bit ADC
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ADC1210S_SER_1
Preliminary data sheet
11.2.2 Anti-kickback circuitry
The sample phase occurs when the internal clock (derived from the clock signal on pin
CLKP/CLKM) is HIGH. The voltage is then held on the sampling capacitors. When the
clock signal goes LOW, the stage enters the hold phase and the voltage information is
transmitted to the ADC core.
Anti-kickback circuitry (R-C filter in
charge injection generated by the sampling capacitance.
The RC filter is also used to filter noise from the signal before it reaches the sampling
stage. The value of the capacitor should be chosen to maximize noise attenuation without
degrading the settling time excessively.
The component values are determined by the input frequency and should be selected so
as not to affect the input bandwidth.
Fig 8.
Fig 9.
Input sampling circuit
Anti-kickback circuit
INM
INP
All information provided in this document is subject to legal disclaimers.
8
7
Rev. 01 — 9 April 2010
Package
ADC1210S series; CMOS or LVDS DDR digital outputs
Figure
ESD
R
R
9) is needed to counteract the effects of a
Parasitics
005aaa073
C
ADC1210S series
INM
INP
R on = 15 Ω
R on = 15 Ω
Internal
Internal
Switch
Switch
clock
clock
Sampling
Sampling
capacitor
capacitor
4 pF
4 pF
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