MT9045 Zarlink Semiconductor, MT9045 Datasheet - Page 18

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MT9045

Manufacturer Part Number
MT9045
Description
T1/E1/OC3 System Synchronizer
Manufacturer
Zarlink Semiconductor
Datasheet

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The crystal should be a fundamental mode type - not an overtone. The fundamental mode crystal permits a simpler
oscillator circuit with no additional filter components and is less likely to generate spurious responses. The crystal
specification is as follows.
Frequency:
Tolerance:
Oscillation Mode:
Resonance Mode:
Load Capacitance:
Maximum Series Resistance:35
Approximate Drive Level:
e.g., R1B23B32-20.0MHz
(20ppm absolute,
TIE Correction (using PCCi)
When Primary Holdover Mode is entered for short time periods, TIE correction should not be enabled. This will
prevent unwanted accumulated phase change between the input and output.
For instance, 10 Normal to Holdover to Normal mode change sequences occur, and in each case Holdover was
entered for 2s. Each mode change sequence could account for a phase change as large as 350ns. Thus, the
accumulated phase change could be as large as 3.5us, and, the overall MTIE could be as large as 3.5us.
When 10 Normal to Holdover to Normal mode change sequences occur without MTIE enabled, and in each case
holdover was entered for 2s, each mode change sequence could still account for a phase change as large as
350ns. However, there would be no accumulated phase change, since the input to output phase is re-aligned after
every Holdover to Normal state change. The overall MTIE would only be 350ns.
Reset Circuit
A simple power up reset circuit with about a 50us reset low time is shown in Figure 10. Resistor R
only and limits current into the RST pin during power down conditions. The reset low time is not critical but should
be greater than 300ns.
0.05ppm is the accuracy of Holdover Mode
50ns is the maximum phase continuity of the MT9045 from Normal Mode to Holdover Mode
200ns is the maximum phase continuity of the MT9045 from Holdover Mode to Normal Mode (with or
without TIE Corrector Circuit)
±
6ppm 0C to 50C, 32pF, 25
Fundamental
Parallel
32pF
1mW
20MHz
As required
Phase hold
Phase state
Phase 10
=
Zarlink Semiconductor Inc.
)
=
=
10
0.05ppm 2s
50ns
MT9045
×
(
250ns
18
+
200ns
×
+
100ns
=
=
250ns
100ns
)
=
3.5us
P
is for protection
Data Sheet

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