MT9045 Zarlink Semiconductor, MT9045 Datasheet - Page 32

• Manufacturer Part Number: MT9045
• Description: T1/E1/OC3 System Synchronizer
• Manufacturer: Zarlink Semiconductor

MT9045
Data Sheet
23. OSCi Master Clock jitter is less than 2nspp, or 0.04UIpp where1UIpp=1/20MHz.
24. Jitter on reference input is less than 7nspp.
25. Applied jitter is sinusoidal.
26. Minimum applied input jitter magnitude to regain synchronization.
27. Loss of synchronization is obtained at slightly higher input jitter amplitudes.
28. Within 10ms of the state, reference or input change.
29. 1UIpp = 125us for 8kHz signals.
30. 1UIpp = 648ns for 1.544MHz signals.
31. 1UIpp = 488ns for 2.048MHz signals.
32. 1UIpp = 323ns for 3.088MHz signals.
33. 1UIpp = 244ns for 4.096MHz signals.
34. 1UIpp = 122ns for 8.192MHz signals.
35. 1UIpp = 61ns for 16.384MHz signals.
36. 1UIpp = 51.44ns for 19.44MHz signals.
37. No filter.
38. 40Hz to 100kHz bandpass filter.
39. With respect to reference input signal frequency.
40. After a RST or TCLR.
41. Master clock duty cycle 40% to 60%.
42. Prior to Holdover Mode, device was in Normal Mode and phase locked.
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