MACH4 Lattice, MACH4 Datasheet - Page 11
MACH4
Manufacturer Part Number
MACH4
Description
High Performance E 2 CMOS In-System Programmable Logic
Manufacturer
Lattice
Datasheet
1.MACH4.pdf
(46 pages)
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The flip-flop can be configured as a D-type or T-type latch. J-K or S-R registers can be
synthesized. The primary flip-flop configurations are shown in Figure 6, although others are
possible. Flip-flop functionality is defined in Table 8. Note that a J-K latch is inadvisable as it will
cause oscillation if both J and K inputs are HIGH.
e. T-type with programmable T polarity
c. Latch with XOR
a. D-type with XOR
L
T
G
D
Figure 6. Primary Macrocell Configurations
AP AR
AP AR
AP AR
g. Combinatorial with programmable polarity
Q
Q
Q
MACH 4 Family
b. D-type with programmable D polarity
d. Latch with programmable D polarity
f. Combinatorial with XOR
D
L
G
AP AR
AP AR
Q
Q
17466G-011
11