TMP86FS49AFG Toshiba Semiconductor, TMP86FS49AFG Datasheet - Page 143

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TMP86FS49AFG

Manufacturer Part Number
TMP86FS49AFG
Description
8-Bit Microcontroller
Manufacturer
Toshiba Semiconductor
Datasheet

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Example :Generating 1024 Hz pulse using TC6 (fc = 16.0 MHz)
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Note 1: In the programmable divider output mode, do not change the TTREGj setting while the timer is running.
Note 2: When the timer is stopped during PDO output, the
Note 3: j = 5, 6
Since TTREGj is not in the shift register configuration in the programmable divider output mode, the new
value programmed in TTREGj is in effect immediately after programming. Therefore, if TTREGi is changed
while the timer is running, an expected operation may not be obtained.
stopped. To change the output status, program TCjCR<TFFj> after the timer is stopped. Do not change the
TCjCR<TFFj> setting upon stopping of the timer.
Example: Fixing the
CLR (TCjCR).3: Stops the timer.
CLR (TCjCR).7: Sets the
LD
LD
LD
Setting port
(TTREG6), 3DH
(TC6CR), 00010001B
(TC6CR), 00011001B
PDOj
pin to the high level when the TimerCounter is stopped
PDOj
pin to the high level.
Page 127
: 1/1024
: Sets the operating clock to fc/2
: Starts TC6.
PDOj
pin holds the output status when the timer is
÷
2
7
/fc
÷
2 = 3DH
7
, and 8-bit PDO mode.
TMP86FS49AFG

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