TMP86FS49AFG Toshiba Semiconductor, TMP86FS49AFG Datasheet - Page 162

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TMP86FS49AFG

Manufacturer Part Number
TMP86FS49AFG
Description
8-Bit Microcontroller
Manufacturer
Toshiba Semiconductor
Datasheet

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12.9 Status Flag
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12.9.4 Receive Data Buffer Full
12.9.5 Transmit Data Buffer Empty
RXD1 pin
RD1BUF
UART1SR<RBFL>
INTRXD1 interrupt
Shift register
UART1SR<RBFL> is cleared to “0” when the RD1BUF is read after reading the UART1SR.
shift register and data transmit starts, transmit data buffer empty flag UART1SR<TBEP> is set to “1”. The
UART1SR<TBEP> is cleared to “0” when the TD1BUF is written after reading the UART1SR.
UART1SR<RBFL>
RXD1 pin
RD1BUF
UART1SR<OERR>
INTRXD1 interrupt
Shift register
Note:Receive operations are disabled until the overrun error flag UART1SR<OERR> is cleared.
Loading the received data in RD1BUF sets receive data buffer full flag UART1SR<RBFL> to "1". The
Note:If the overrun error flag UART1SR<OERR> is set during the period between reading the UART1SR and read-
When no data is in the transmit buffer TD1BUF, that is, when data in TD1BUF are transferred to the transmit
ing the RD1BUF, it cannot be cleared by only reading the RD1BUF. Therefore, after reading the RD1BUF,
read the UART1SR again to check whether or not the overrun error flag which should have been cleared still
remains set.
Figure 12-8 Generation of Receive Data Buffer Full
Figure 12-7 Generation of Overrun Error
xxx0 **
yyyy
xxx0 **
yyyy
Final bit
Final bit
Page 146
xxxx0
xxxx0
*
*
Stop
Stop
1xxxx0
xxxx
1xxxx0
After reading UART1SR then
RD1BUF clears RBFL.
After reading UART1SR then
RD1BUF clears OERR.
TMP86FS49AFG

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