TDA8029 Philips Semiconductors, TDA8029 Datasheet - Page 37

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TDA8029

Manufacturer Part Number
TDA8029
Description
Low power single card reader
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
Table 57 Description of register bits
2003 Oct 30
handbook, full pagewidth
Low power single card reader
BIT
7
6
5
4
3
2
1
0
ENINT1
DISTBE/RBF
ENRX
SAN
AUTOCONV
CKU
PSC
SYMBOL
2
CKU
CLK
CLK
Enable INT1. If ENINT1 = 1, a HIGH to LOW transition on pin INT1_N will
wake-up the TDA8029 from the Power-down mode. Note that in case of
reception of a character when in Power-down mode, the start of the frame
will be lost. When not in Power-down mode ENINT1 has no effect. For
details on Power-down mode see Section 8.15.
Disable TBE/RBF interrupts. If DISTBE/RBF is set, then reception or
transmission of a character will not generate an interrupt. This feature is
useful for increasing communication speed with the card; in this case, the
copy of TBE/RBF bit within MSR must be polled, and not the original, in
order not to loose priority interrupts which can occur in USR.
Not used.
Enable RX. If ENRX = 1, a HIGH to LOW transition on pin RX will wake-up
the TDA8029 from the Power-down mode. Note that in case of reception of
a character when in Power-down mode, the start of the frame will be lost.
When not in Power-down mode ENRX has no effect. For details on
Power-down mode see Section 8.15.
Synchronous/Asynchronous. SAN is set by software if a synchronous
card is expected. The UART is then bypassed and only bit 0 in registers
URR and UTR is connected to pin I/O. In this case the clock is controlled by
bit SC in register CCR.
Automatic set convention. If AUTOCONV = 1, then the convention is set
by software using bit CONV in register UCR1. If AUTOCONV = 0, then the
configuration is automatically detected on the first received character whilst
the start session (bit SS) is set. AUTOCONV must not be changed during a
card session.
Clock Unit. For baud rates other than those given in Table 58, there is the
possibility to set bit CKU = 1. In this case, the ETU will last half the number
of card clock cycles equal to prescaler PDR. Note that bit CKU = 1 has no
effect if f
possible when the card is clocked with the frequency on pin XTAL1.
Prescaler value. If PSC = 1, then the prescaler value is 32; if PSC = 0,
then the prescaler value is 31. One ETU will last a number of card clock
cycles equal to prescaler
are achievable with this configuration. See Fig.10 and Table 58.
MUX
Fig.10 ETU generation.
CLK
= f
31 OR 32
XTAL
37
. This means, for example, that 76800 baud is not
PDR. All baud rates specified in ISO 7816 norm
DESCRIPTION
PDR
FCE872
ETU
Product specification
TDA8029

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