IDT72V211L15PFI IDT, Integrated Device Technology Inc, IDT72V211L15PFI Datasheet

IC FIFO SYNC 512X9 15NS 32-TQFP

IDT72V211L15PFI

Manufacturer Part Number
IDT72V211L15PFI
Description
IC FIFO SYNC 512X9 15NS 32-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet

Specifications of IDT72V211L15PFI

Function
Synchronous
Memory Size
4.6K (512 x 9)
Access Time
15ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Rate
-
Other names
72V211L15PFI
800-1515

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72V211L15PFI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72V211L15PFI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
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FUNCTIONAL BLOCK DIAGRAM
FEATURES:
DESCRIPTION:
©2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncFIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
256 x 9-bit organization IDT72V201
512 x 9-bit organization IDT72V211
1,024 x 9-bit organization IDT72V221
2,048 x 9-bit organization IDT72V231
4,096 x 9-bit organization IDT72V241
8,192 x 9-bit organization IDT72V251
10 ns read/write cycle time
5V input tolerant
Read and Write clocks can be independent
Dual-Ported zero fall-through time architecture
Empty and Full Flags signal FIFO status
Programmable Almost-Empty and Almost-Full flags can be set to
any depth
Programmable Almost-Empty and Almost-Full flags default to
Empty+7, and Full-7, respectively
Output Enable puts output data bus in high-impedance state
Advanced submicron CMOS technology
Available in 32-pin plastic leaded chip carrier (PLCC) and 32-pin
plastic Thin Quad FlatPack (TQFP)
Industrial temperature range (–40° ° ° ° ° C to +85° ° ° ° ° C) is available
Green parts available, see ordering information
The IDT72V201/72V211/72V221/72V231/72V241/72V251 SyncFIFOs™
WRITE CONTROL
WCLK
WRITE POINTER
RESET LOGIC
WEN1
LOGIC
RS
WEN2
3.3 VOLT CMOS SyncFIFO™
256 x 9, 512 x 9,
1,024 x 9, 2,048 x 9,
4,096 x 9 and 8,192 x 9
OE
OUTPUT REGISTER
1,024 x 9, 2,048 x 9,
4,096 x 9, 8,192 x 9
INPUT REGISTER
256 x 9, 512 x 9,
RAM ARRAY
D
Q
0
0
- D
- Q
8
8
1
are very high-speed, low-power First-In, First-Out (FIFO) memories with
clocked read and write controls. The architecture, functional operation and pin
assignments are identical to those of the IDT72201/72211/72221/72231/
72241/72251, but operate at a power supply voltage (Vcc) between 3.0V and
3.6V. These devices have a 256, 512, 1,024, 2,048, 4,096 and 8,192 x 9-bit
memory array, respectively. These FIFOs are applicable for a wide variety of
data buffering needs such as graphics, local area networks and interprocessor
communication.
controlled by a free-running clock (WCLK), and two Write Enable pins
(WEN1, WEN2). Data is written into the Synchronous FIFO on every rising
clock edge when the Write Enable pins are asserted. The output port is
controlled by another clock pin (RCLK) and two Read Enable pins (REN1,
REN2). The Read Clock can be tied to the Write Clock for single clock
operation or the two clocks can run asynchronous of one another for dual-
clock operation. An Output Enable pin (OE) is provided on the read port
for three-state control of the output.
Two programmable flags, Almost-Empty (PAE) and Almost-Full (PAF), are
provided for improved system control. The programmable flags default to
Empty+7 and Full-7 for PAE and PAF, respectively. The programmable flag
offset loading is controlled by a simple state machine and is initiated by asserting
the Load pin (LD).
technology.
These FIFOs have 9-bit input and output ports. The input port is
The Synchronous FIFOs have two fixed flags, Empty (EF) and Full (FF).
These FIFOs are fabricated using IDT's high-speed submicron CMOS
OFFSET REGISTER
READ CONTROL
READ POINTER
RCLK
LOGIC
LOGIC
FLAG
REN1
REN2
LD
IDT72V201, IDT72V211
IDT72V221, IDT72V231
IDT72V241, IDT72V251
4092 drw 01
EF
PAE
PAF
FF
OCTOBER 2008
DSC-4092/5

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IDT72V211L15PFI Summary of contents

Page 1

FEATURES: • • • • • 256 x 9-bit organization IDT72V201 • • • • • 512 x 9-bit organization IDT72V211 • • • • • 1,024 x 9-bit organization IDT72V221 • • • • • 2,048 x 9-bit organization ...

Page 2

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 PIN CONFIGURATION INDEX ...

Page 3

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 ABSOLUTE MAXIMUM RATINGS Symbol Rating (2) V Terminal Voltage with TERM Respect to GND T Storage Temperature ...

Page 4

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 ELECTRICAL CHARACTERISTICS (Commercial 3.3 ±0.3V 0° 70°C;Industrial Symbol ...

Page 5

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 SIGNAL DESCRIPTIONS INPUTS: DATA IN (D0 - D8) Data inputs for 9-bit wide data. CONTROLS: RESET (RS) ...

Page 6

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 IDT72V201 - 256 x 9-BIT 8 7 Empty Offset (LSB) Reg. Default Value 007H ...

Page 7

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 OUTPUTS: FULL FLAG (FF) The Full Flag (FF) will go LOW, inhibiting further write operation, when the ...

Page 8

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 REN1, REN2 WEN1 (1) WEN2/LD EF, PAE FF, PAF NOTES: 1. ...

Page 9

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 CLKH RCLK t t ENS ENH REN1, REN2 OLZ ...

Page 10

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 WRITE WCLK t SKEW1 WEN1 WEN2 (If Applicable) RCLK t ...

Page 11

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 CLKH WCLK t ENS WEN1 t ENS WEN2 (If Applicable) Full - ( ...

Page 12

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 CLK t t CLKH CLKL WCLK t ENS LD t ENS WEN1 ...

Page 13

IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 OPERATING CONFIGURATIONS SINGLE DEVICE CONFIGURATION A single IDT72V201/72V211/72V221/72V231/72V241/72V251 may be used when the application requirements are for ...

Page 14

ORDERING INFORMATION XXXXX Device Type Power Speed Package NOTES: 1. Industrial temperature range product for the 15ns is available as a standard device. All other speed grades are available by special order. 2. Green parts available. For ...

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