K20P104M100SF2 Freescale Semiconductor, K20P104M100SF2 Datasheet - Page 14

• Manufacturer Part Number: K20P104M100SF2
• Description: K20 Sub-Family
• Manufacturer: Freescale Semiconductor

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General
5.1.4 Power mode transition operating behaviors
In the table below, all specifications except t
configuration:
1. Normal boot (FTFL_OPT[LPBOOT]=1)
14
Symbol
• CPU and system clocks = 100MHz
• Bus and FlexBus clocks = 50 MHz
• Flash clock = 25 MHz
t
POR
After a POR event, amount of time from the point V
reaches 1.8V to execution of the first instruction
across the operating temperature range of the chip.
RUN → VLLS1 → RUN
RUN → VLLS2 → RUN
RUN → VLLS3 → RUN
RUN → LLS → RUN
RUN → STOP → RUN
RUN → VLPS → RUN
Description
• RUN → VLLS1
• VLLS1 → RUN
• RUN → VLLS2
• VLLS2 → RUN
• RUN → VLLS3
• VLLS3 → RUN
• RUN → LLS
• LLS → RUN
• RUN → STOP
• STOP → RUN
• RUN → VLPS
• VLPS → RUN
Table 4. Power mode transition operating behaviors
K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Preliminary
POR
DD
, assume the following clock
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
123.8
Max.
49.3
49.2
300
4.1
4.1
4.1
4.1
5.9
4.1
4.2
4.1
5.8
Freescale Semiconductor, Inc.
Unit
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
Notes
1
Datasheet pdf - http://www.DataSheet4U.net/