K20P104M100SF2 Freescale Semiconductor, K20P104M100SF2 Datasheet - Page 53

• Manufacturer Part Number: K20P104M100SF2
• Description: K20 Sub-Family
• Manufacturer: Freescale Semiconductor

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6.9 Human-machine interfaces (HMI)
6.9.1 General Switching Specifications
These general purpose specifications apply to all signals configured for GPIO, SCI,
FlexCAN, CMT, and I
1. The greater synchronous and asynchronous timing must be met.
2. This is the shortest pulse that is guaranteed to be recognized.
Freescale Semiconductor, Inc.
Symbol
I2S_BCLK (input)
I2S_FS (output)
I2S_FS (input)
I2S_TXD
I2S_RXD
GPIO pin interrupt pulse width (digital glitch filter disa‐
bled) — Synchronous path
GPIO pin interrupt pulse width (digital glitch filter disa‐
bled, analog filter enabled) — Asynchronous path
GPIO pin interrupt pulse width (digital glitch filter disa‐
bled, analog filter disabled) — Asynchronous path
External reset pulse width (digital glitch filter disabled)
Mode select (EZP_CS) hold time after reset deasser‐
tion
Port rise and fall time (high drive strength)
Port rise and fall time (low drive strength)
Description
• Slew disabled
• Slew enabled
• Slew disabled
• Slew enabled
K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
S15
S15
2
Table 43. General switching specifications
C signals.
S12
Figure 23. I
S13
S17
S11
S18
2
S timing — slave modes
Preliminary
S12
S16
S15
Peripheral operating requirements and behaviors
TBD
Min.
100
1.5
16
—
—
—
—
2
Max.
12
36
32
36
—
—
—
—
—
Bus clock
Bus clock
S14
cycles
cycles
Unit
ns
ns
ns
ns
ns
ns
S16
S16
Notes
1
2
3
4
2
53
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