K20P104M100SF2 Freescale Semiconductor, K20P104M100SF2 Datasheet - Page 21

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K20P104M100SF2

Manufacturer Part Number
K20P104M100SF2
Description
K20 Sub-Family
Manufacturer
Freescale Semiconductor
Datasheet
www.DataSheet.co.kr
Freescale Semiconductor, Inc.
Symbol
J10
J11
J12
J13
J14
J3
J4
J5
J6
J7
J8
J9
TCLK (input)
TCLK clock pulse width
TCLK rise and fall times
Boundary scan input data setup time to TCLK rise
Boundary scan input data hold time after TCLK rise
TCLK low to boundary scan output data valid
TCLK low to boundary scan output high-Z
TMS, TDI input data setup time to TCLK rise
TMS, TDI input data hold time after TCLK rise
TCLK low to TDO data valid
TCLK low to TDO high-Z
TRST assert time
TRST setup time (negation) to TCLK high
Description
• JTAG and CJTAG
• Serial Wire Debug
K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Table 11. JTAG electricals (continued)
Figure 5. Test clock input timing
J4
Preliminary
J3
J2
J4
Peripheral operating requirements and behaviors
J3
Min.
100
20
10
20
16
0
1
8
Max.
30
30
3
4
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21
Datasheet pdf - http://www.DataSheet4U.net/

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