LM1229YA National Semiconductor, LM1229YA Datasheet - Page 23

• Manufacturer Part Number: LM1229YA
• Description: I2C Compatible CMOS TV RGB and Deflection Processor
• Manufacturer: National Semiconductor

Application Register Detail
HORIZONTAL EHT CORRECTION
Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
Bits 1–0: These two bits determine the amplitude of the phase correction. When both are both 0, the compensation is a minimum
PARALLELOGRAM CORRECTION
Bits 7–0: Sets the parallelogram correction which can be either polarity. A value of 0x7F gives no correction. A value of 0x00 tilts
PINCUSHION BALANCE (BOW)
Bits 7–0: Sets the amount of pin balance (bow) correction which can be either polarity. A value of 0x7F gives no correction. A
VERTICAL SIZE
Bits 7–0: Sets the amplitude of the vertical ramp. 0x00 gives minimum size and 0xFF gives maximum size.
VERTICAL EHT CORRECTION
Bits 7–4: Sets the amount of EW EHT correction. This can be disabled with bit 4 of the SYNCPOL register.
Bits 4–0: Sets the amount of vertical drive EHT correction. This can be disabled with bit 3 of the SYNCPOL register.
‘C’ CORRECTION
Bits 6–0: Sets the amount of C correction which can be either polarity. A value of 0x3F gives no correction. Smaller values will
‘S’ CORRECTION
Bits 6–0: Sets the amount of S correction. 0x00 gives no correction and 0x7F gives maximum correction.
VERTICAL POSITION
Register
Register
PIN_BAL
Register
Register
Register
Register
Register
Register
HEHT
VSIZE
VEHT
VPOS
PAR
C
S
When this bit is a 0, no attempt is made to remove HSYNC equalizing pulses. When set to a 1, HSYNC equalizing
pulses are removed.
When this bit is a 0, the XRay protection is functional. When set to a 1, the XRay protection is disabled.
When set to a 1, HDRIVE output is off and the output will be pulled high by the external pullup resistor (this is the power
up default). When this bit is a 0, the HDRIVE output is functional.
When this bit is a 0, the horizontal phase corrections (parallelogram and bow) are functional. When set to a 1, these
corrections are disabled.
When this bit is 0 the HEHT compensation is enabled. When a 1, compensation is disabled.
This is the compensation polarity bit. When it is a 0, a reduction in the voltage at pin 20 causes the picture to shift to
the left. When it is a 1, the shift is to the right.
(not zero) and is determined by the external resistor R
through 11, the compensation is increased according to Table 4.
the picture to the right and 0xFF tilts the picture to the left.
value of 0x00 bows the top and bottom to the left. A value of 0xFF bows the top and bottom to the right.
stretch the lower part of the screen. Larger values will stretch the upper part of the screen.
Addr
0x42
Addr
Addr
Addr
Addr
Addr
Addr
0x43
Addr
0x45
0x46
0x47
0x48
0x49
0x44
EQPRM
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
X
X
XRayOff
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
VEHT2[7:4]
(Continued)
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
HOff
23
EHT
connected between pins 21 and 24. When these bits are 01
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
HPCOff
Bit 4
Bit 4
PIN_BAL[7:0]
VSIZE[7:0]
VPOS[7:0]
PAR[7:0]
C[6:0]
S[6:0]
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
EHTEN
Bit 3
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
VEHT1[3:0]
Bit 2
POL
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
HEHT[3:0]
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Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0