LM1247 National Semiconductor, LM1247 Datasheet - Page 25

• Manufacturer Part Number: LM1247
• Description: 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs
• Manufacturer: National Semiconductor

LM1247 Address Map
END-OF-SCREEN CODE
To signify the end of the window, a special End-of-Screen (EOS) code is used in place of a End-of-Line (EOL) code. There must
be at least one EOS code in the Page RAM to avoid unpredictable behaviour. This can be accomplished by clearing the RAM by
writing a 0 to bit 3 of the FRMCTRL1 Register, 0x8400, immediately after power up.
Bits 7-0 are all zeros. Bits 11-0 will have the previously entered AC but this is not used and so these bits are “don’t cares”.
OSD CONTROL REGISTERS
These registers, shown in Table 14, control the size, position, enhanced features and ROM bank selection of up to two
independent OSD windows. Any bits marked as “X” are reserved and should be written to with zeros and should be ignored when
the register is read. Additional register detail is provided in the Control Register Definitions Section, later in this document.
Register
FRMCTRL1
FRMCTRL2
CHARFONTACC
VBLANKDUR
CHARHTCTRL
BBHLCTRLB0
BBHLCTRLB1
BBLLCTRLB0
BBLLCTRLB1
CHSDWCTRLB0
CHSDWCTRLB1
ROMSIGCTRL
ROMSIGDATAB0 0x840E
ROMSIGDATAB1 0x840F
HSTRT1
VSTRT1
W1STRTADRL
W1STRTADRH
COLWIDTH1B0
COLWIDTH1B1
COLWIDTH1B2
COLWIDTH1B3
HSTRT2
VSTRT2
W2STRTADRL
W2STRTADRH
COLWIDTH2B0
COLWIDTH2B1
COLWIDTH2B2
COLWIDTH2B3
Any registers in the range of 0x8420 - 0x8426 are for National Semiconductor internal use only and should not be written to
under application conditions.
BANKSEL_0-1
BANKSEL_2-3
ATTRIBUTE CODE
Address
0x840D
0x841C
0x841D
0x8400
0x8401
0x8402
0x8403
0x8404
0x8405
0x8406
0x8407
0x8408
0x8409
0x840A
0x8410
0x8412
0x8413
0x8414
0x8415
0x8416
0x8417
0x8418
0x8419
0x841A
0x841B
0x841E
0x841F
0x8427
0x8428
0x8411
ATT[3:0]
Default
0xFF
0x5B
0x10
0x80
0x00
0x10
0x51
0x01
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x13
0x14
0x00
0x00
0x00
0x00
0x00
0x00
0x56
0x00
0x01
0x00
0x00
0x00
0x00
0x10
0x32
(Continued)
TABLE 14. OSD Control Register Detail
D7
PIXELS_PER_LINE[2:0]
X
X
X
X
X
X
X
X
X
X
X
TABLE 13. End-of-Screen Code
B[1:0]
B[1:0]
B[1:0]
0
D6
X
X
X
X
X
X
X
X
0
B1AD[2:0]
B3AD[2:0]
25
D5
X
X
X
X
X
X
X
X
0
END-OF-SCREEN CODE
CHAR_HEIGHT[7:0]
G[2:0]
G[2:0]
G[2:0]
VBLANK_DURATION[6:0]
TD
D4
X
X
X
X
X
X
X
COL[23:16]
COL[31:24]
COL[23:16]
COL[31:24]
HPOS[7:0]
VPOS[7:0]
ADDR[7:0]
HPOS[7:0]
VPOS[7:0]
ADDR[7:0]
CRC[15:8]
COL[15:8]
COL[15:8]
CRC[7:0]
COL[7:0]
COL[7:0]
0
CDPR
D3
X
X
X
X
X
X
X
X
X
0
BLINK_PERIOD[4:0]
D2E
D2
0
X
X
X
X
X
X
X
B0AD[2:0]
B2AD[2:0]
R[2:0]
R[2:0]
R[2:0]
ATTR
D1E
0
D1
X
X
X
X
X
X
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ADDR[8]
ADDR[8]
FONT4
0
OSE
CRS
B[2]
B[2]
B[2]
D0