LM1247 National Semiconductor, LM1247 Datasheet - Page 26

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LM1247

Manufacturer Part Number
LM1247
Description
150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs
Manufacturer
National Semiconductor
Datasheet

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LM1247 Address Map
PREAMPLIFIER CONTROL
These registers, shown in Table 15, control the gains, DAC outputs, PLL, horizontal and vertical blanking, OSD contrast and DC
offset of the video outputs. Any bits marked as “X” are reserved and should be written to with zeros and should be ignored when
the register is read. Additional register detail is provided in the Control Register Definitions Section, later in this document.
TWO-COLOR ATTRIBUTE RAM
This address range (0x8440 - 0x8497) contains the attribute lookup tables used for displaying two-color characters. There are 16
groups of 4 bytes each according to the format shown in Table 16. The attributes are stored starting with Color 0 (background)
and each color is stored red first, green second and then blue. They may be written or read using the following address format:
When reading, it is OK to read only one, two, or all three bytes. When writing more than one 2-color attribute using the auto
increment feature, all four bytes must be written. When writing, bytes 0 through 2 must be written in order. Bytes 0 through 2 will
take effect after byte 2 is written. Since byte 3 contains all reserved bits, this byte may be written, but will have no effect. Any bits
marked as “X” are reserved and should be written to with zeros and should be ignored when the register is read.
FOUR-COLOR ATTRIBUTE RAM
This address range (0x8500 - 0x857F), contains the attribute lookup tables used for displaying four-color characters. There are
16 groups of 8 bytes each according to the format shown in Table 17. The attributes are stored starting with Color 0 (background)
and each color is stored red first, green second and then blue. They may be written or read using the following address format:
When writing, bytes 0 through 2 must be written in order and bytes 4 through 6 must be written in order. Bytes 0 through 2 will
take effect after byte 2 is written. Bytes 4 through 6 will take effect after byte 6 is written. Since bytes 5 and 7 contain all reserved
bits, these bytes may be written, but no effect will result. When reading, it is OK to read only one, two, or all three bytes. If writing
more than one 4-color attributes using the auto increment feature, all eight bytes must be written. Any bits marked as “X” are
reserved and should be written to with zeros and should be ignored when the register is read.
Register
BGAINCTRL
GGAINCTRL
RGAINCTRL
CONTRCTRL
DAC1CTRL
DAC2CTRL
DAC3CTRL
DAC4CTRL
DACOSDDCOFF
GLOBALCTRL
AUXCTRL
PLLFREQRNG
SRTSTCTRL
ATT2C0n
ATT2C1n
ATT2C2n
ATT2C3n
Register
Address
0x8430
0x8431
0x8432
0x8433
0x8434
0x8435
0x8436
0x8437
0x8438
0x8439
0x843A
0x843E
0x843F
0x8440 + 4n
Address
Default
+1
+2
+3
0xE0
0xE0
0xE0
0xE0
0x80
0x80
0x80
0x80
0x94
0x00
0x07
0x16
0x00
TABLE 15. LM1247 Preamplifier Interface Registers
TABLE 16. LM1247 Two-Color Attribute Registers
where: N = Attribute number (0x0 ≤ N ≤ 0xF)
where: N = Attribute number (0x0 ≤ N ≤ 0xF)
(Continued)
D7
X
X
X
X
X
X
X
X
X
B = Attribute byte number (0x0 ≤ B ≤ 0x3)
B = Attribute byte number (0x0 ≤ B ≤ 0x7)
Address = 0x8440 + (N
Address = 0x8500 + (N
C1B[0]
D7
X
X
A/D[0]
C0B[1:0]
D6
X
X
X
DCF[1:0]
D6
26
X
X
CLMP
D5
X
X
X
C1G[2:0]
*
D5
*
X
0x4) + B
0x8) + B
OSD CONT[1:0]
D4
X
X
X
X
C0G[2:0]
DAC1[7:0]
DAC2[7:0]
DAC3[7:0]
DAC4[7:0]
CONTRAST[6:0]
D4
X
GGAIN[6:0]
RGAIN[6:0]
BGAIN[6:0]
EF[3:0]
OOR
D3
X
X
X
D3
X
C1R[2:0]
VBL
D2
X
X
X
D2
X
DS OFFSET[1:0]
C0R[2:0]
ACD
D1
PS
X
D1
X
PFR[1:0]
C1B[2:1]
SRST[0]
C0B[2]
HBD
D0
BV
D0
X

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