LM1247 National Semiconductor, LM1247 Datasheet - Page 39

• Manufacturer Part Number: LM1247
• Description: 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs
• Manufacturer: National Semiconductor

Pre-Amplifier Interface Registers
DAC 4 Output Level:
DAC Config, OSD Contrast & DC Offset:
Global Video Control:
Auxillary Control:
PLL Range:
Bits 7–0
Bits 7–0
Bits 2–0
Bits 4–3
Bit 5
Bit 6
Bit 7
Bit 0
Bit 1
Bits 7–2
Bit 0
Bit 1
Bit 2
Bits 3–7
This register determines the output of DAC 3. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register (0x8438).
This register determines the output of DAC 4. The output of this DAC can be scaled and mixed
with the outputs of DACs 1–3 as determined by bit 6 of the DAC Config, OSD Contrast & DC
Offset Register.
These determine the DC offset of the three video outputs, blue, red and green.
These determine the contrast of the internally generated OSD.
When this bit is a 0, the full-scale outputs of DACs 1–3 are 0.5V to 4.5V. When it is a 1 the
full-scale level is 0.5V to 2.5V.
When this bit is a 0, the DAC 4 output is independent. When it is a 1, the DAC 4 output is scaled
by 50% and added to the outputs of DACs 1–3.
Reserved and should be set to zero.
When this bit is a 1, the video outputs are blanked (set to black level). When it is a 0, video is not
blanked.
When this bit is a 1, the analog sections of the preamplifier are shut down for low power
consumption. When it is a 0, the analog sections are enabled.
Reserved and should be set to 0.
When this bit is a 1, the horizontal blanking input at pin 24 is gated to the video outputs to provide
horizontal blanking. When it is a 0, the horizontal blanking at the outputs is disabled.
When this bit is a 1, the internal auxillary clamp is enabled. This operates on the blue video input
so that if its level falls below 0.8 VDC, then this turns the internal clamp on to raise the output
level. This is not to be confused with the black level video clamp in the next register (0x843E).
This bit is reserved and should be set to a 1.
These bits are reserved and should be set to 0.
Res’d
X
X
X
X
Reserved
DAC Options
X
X
X
DCF[1:0]
X
X
X
Reserved
Reserved
DACOSDDCOFF (0x8438)
PLLFREQRNG (0x843E)
GLOBALCTRL (0x8439)
DAC4CTRL (0x8437)
DAC 4 Output Level
AUXCTRL (0x843A)
Clamp
CLMP
OSD Contrast
(Continued)
X
X
OSD[1:0]
BA[7:0]
39
OOR
OSD
X
X
VBlank
VBL
X
X
DC Offset
DC[2:0]
Int Clp
Power
ACEn
PS
PFR[1:0]
PLL
H Blnk
Blank
HBEn
BV
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